List of Articles atefeh salimi

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  1 - Optimal Hardware Accelerator Design for Implementation of BLAKE2b Hash Function Algorithm
  Mohsen Dadkhah Atefeh Salimi Nadia Hajikhiadani
  10.30486/teeges.2022.1960348.1019
  Recently, there has been a surge in the popularity of cryptocurrencies, which are digital currencies that enabletransactions through a decentralized consensus mechanism. In this paper, one of the most effective Equihashalgorithms subcategories, known as BLAKE2, is prese More

  Recently, there has been a surge in the popularity of cryptocurrencies, which are digital currencies that enabletransactions through a decentralized consensus mechanism. In this paper, one of the most effective Equihashalgorithms subcategories, known as BLAKE2, is presented, and then effort has been made to optimize thecompression function as one of the main and most challenging blocks of the BLAKE2 algorithm. In addition,by cognitive partitioning the algorithm between the software/hardware parts of the device, efforts have beenmade to improve the speed and the number of resource usage. For comparison, implementation was carriedout with high-level vs HDL design methods for full and semi-parallel structures. All three methods wereimplemented using Vivado tools exploiting ZC706 evaluation board. The implementation results indicatedthat the number of resource usage (LUT/FF) and power consumption of the proposed structure is equal to(6575/4726) and 0.316(W) respectively Which has created a significant reduction compared to other methods.Moreover, the hash rate and the energy efficiency of the proposed structure are equal to 50 MHash/s and 6.3(𝑛𝐽/𝐻𝑎𝑠ℎ) respectively Manuscript profile
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  2 - Design and Simulation of a Low-Power Static Random-Access Memory (SRAM) Cell based on FinFET Transistor
  Fatemeh Zolfaghari Sichani Mohammad Rouhollah Yazdani Atefeh Salimi Maryam Monemian
  Fin field-effect transistors (FinFETs) are good alternatives to conventional metal-oxide-semiconductor field-effect transistors (MOSFETs) because of their potential for controlling the effects of short channel, leakage current, propagation delay and power loss. Since SR More

  Fin field-effect transistors (FinFETs) are good alternatives to conventional metal-oxide-semiconductor field-effect transistors (MOSFETs) because of their potential for controlling the effects of short channel, leakage current, propagation delay and power loss. Since SRAMs occupy most of the advanced processors’ space, main power consumption in these processors is attributed to these memories. In a common 6-transistor static random access memory (6T SRAM) cell, the capacitors of both bit lines must be charged and discharged when reading and writing tasks are performed. Thus, most of the power consumption is related to this mechanism. In this paper, 7-Transistor static random-access memory (7T SRAM) cell is proposed that is able to write using one of the bit lines. The results of simulation using HSPICE software and in 32 nm technology show that the power consumption of this cell during write operation when the value "0" is stored in the cell is at most 98.6% and it has decreased by 99.8% when the value "1" is present in the cell. Also, the amount of Static Noise Margin (SNM) in standby and cell reading modes is equal to 0.2025 and 0.2011 volts respectively. Manuscript profile