Optimal Hardware Accelerator Design for Implementation of BLAKE2b Hash Function Algorithm

Subject Areas : Electronic Engineering

Mohsen Dadkhah ¹ , Atefeh Salimi ² , Nadia Hajikhiadani ³

1 - Department of Electrical Engineering, Isfahan (Khorasgan) Branch, Islamic Azad University, Khorasgan, Isfahan, Iran
2 - Department of Electrical Engineering, Isfahan (Khorasgan) Branch, Islamic Azad University, Khorasgan, Isfahan, Iran
3 - Electrical Engineering Department, Arak University of Technology, Arak, Iran

Received: 2022-03-06 Accepted : 2022-07-26 Published : 2022-11-22

Keywords: Equihash, SOC, Blockchain, BLAKE2b, Cryptocurrency,

Abstract :

Recently, there has been a surge in the popularity of cryptocurrencies, which are digital currencies that enabletransactions through a decentralized consensus mechanism. In this paper, one of the most effective Equihashalgorithms subcategories, known as BLAKE2, is presented, and then effort has been made to optimize thecompression function as one of the main and most challenging blocks of the BLAKE2 algorithm. In addition,by cognitive partitioning the algorithm between the software/hardware parts of the device, efforts have beenmade to improve the speed and the number of resource usage. For comparison, implementation was carriedout with high-level vs HDL design methods for full and semi-parallel structures. All three methods wereimplemented using Vivado tools exploiting ZC706 evaluation board. The implementation results indicatedthat the number of resource usage (LUT/FF) and power consumption of the proposed structure is equal to(6575/4726) and 0.316(W) respectively Which has created a significant reduction compared to other methods.Moreover, the hash rate and the energy efficiency of the proposed structure are equal to 50 MHash/s and 6.3(𝑛𝐽/𝐻𝑎𝑠ℎ) respectively

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