In this paper, the design and simulation of a transmission impedance amplifier using 0.18 µ CMOS technology for use in the amplifier section of optical telecommunication receivers are presented. The idea presented in this paper is based on the use of a parallel-pa
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In this paper, the design and simulation of a transmission impedance amplifier using 0.18 µ CMOS technology for use in the amplifier section of optical telecommunication receivers are presented. The idea presented in this paper is based on the use of a parallel-parallel feedback structure with a cascade interest rate. This structure is quasi-differential and is designed to increase the allowable range of input power and prevent amplifier saturation, a circuit with a variable gain. The simulation results show a maximum gain of 64 dB, a bandwidth of 1.8 GHz, power consumption of 20mw, and a spectral intensity of the noise current referred to as the PA / 9 input. Also, by using variable gain control, the gain of the amplifier transmission impedance can be reduced to 46 dBΩ. The results indicate that the proposed design is very suitable for a 2.5 Gb / s optical telecommunication system.
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