تفریق¬کننده¬های تقریبی کم¬مصرف و قابل¬اعتماد برای کاربردهای پردازش تصویر
محورهای موضوعی : مهندسی الکترونیک
فاطمه پولادی
1
,
فرشاد پسران
2
,
نبی اله شیری
3
1 - گروه مهندسی برق، ,واحد شیراز، دانشگاه آزاد اسلامی، شیراز، ایران
2 - گروه مهندسی برق، ,واحد شیراز، دانشگاه آزاد اسلامی، شیراز، ایران
3 - گروه مهندسی برق، ,واحد شیراز، دانشگاه آزاد اسلامی، شیراز، ایران
کلید واژه: محاسبات¬تقریبی, تفریق, تکنیک دروازه ورودی انتشار , ترانزیستورهای اثر میدانی نانولوله کربنی,
چکیده مقاله :
در این مقاله، دو تفریق¬کننده تقریبی جدید ارائه شده است. مدارهای پیشنهادی بر¬اساس تکنیک‌های ورودی انتشار گیت (GDI) و آستانه دینامیکی (DT) پیاده‌سازی شده‌اند و مدار پیشنهادی1 و مدارپیشنهادی2 نام‌گذاری شده‌اند. تفریق¬کننده پیشنهادی 1 دارای 10 ترانزیستور است، در حالی که مدارپیشنهادی 2 دارای 12 ترانزیستور است. تفریق¬کننده¬ها توسط فناوری ترانزیستور اثر میدانی نانولوله کربنی 32 نانومتری (CNTFET) پیاده¬سازی می¬شوند. مطالعات مختلفی انجام شده و نشان¬دهنده راندمان و عملکرد بالای مدارها در شرایط مختلف بدون کاهش ولتاژ خروجی آنهاست که ناشی از استفاده از DT در اجرای آنها می¬باشد. مدارهای پیشنهادی از گیت¬های XOR و NOT استفاده می¬کنند که هر دو دارای 4 حالت از 8 حالت خطا هستند. تفریق¬کننده¬های ارائه شده را می¬توان در یک تقسیم¬کننده بدون¬علامت با ساختارهای مختلف اعم از عمودی، افقی، مربع و مثلثی و غیره پیاده¬سازی کرد و درنهایت می¬توان از آنها در برنامه¬های پردازش تصویر برای تشخیص تفاوت بین دو تصویر اعم از پزشکی یا پزشکی استفاده کرد. تصاویر استاندارد نتایج شبیه‌سازی عملکرد بهتر مدارهای پیشنهادی، مدارپیشنهادی1 و مدارپیشنهادی 2 را به ترتیب 36/88% و 25/83% صرفه‌جویی در PDP نشان می‌دهد.
In this paper, two new approximate subtractors are presented. The proposed circuits are implemented based on gate diffusion input (GDI) and dynamic threshold (DT) techniques and are named Proposed-1 and Proposed-2. The Proposed-1 subtractor has 10 transistors, while Proposed-2 has 12 transistors. Subtractors are implemented by 32 nm carbon nanotube field effect transistor (CNTFET) technology. Various studies have been performed and show the high efficiency and performance of the circuits in different conditions without reducing their output voltage, which is caused by the use of DT in their implementation. The proposed circuits use XOR and NOT gates, both of which have 4 out of 8 error states. The presented subtractors can be implemented in an unsigned non-recovery divider with different structures including vertical, horizontal, square and triangular, etc., and finally, they can be used in image processing applications to detect the difference between two images, either medical or standard images. The simulation results show the better performance of the proposed circuits, Proposed-1 and Proposed-2 save PDP of 88.36% and 83.25%, respectively.
استفاده از محاسبات تقریبی و تکنیک GDI برای کاهش مصرف توان.
ادغام تکنیک DT و فناوری CNTFET برای حل مشکلات گیت های GDI.
طراحی تفریق کننده های تقریبی کم مصرف با مساحت کم با استفاده از تنها 10 و 12 ترانزیستور.
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