High-Speed Ternary Half adder based on GNRFET

Subject Areas : Journal of Nanoanalysis

Mahdieh Nayeri ¹ , Peiman Keshavarzian ² , Maryam Nayeri ³

1 - Department of Computer Engineering, Kerman Branch, Islamic Azad University, Kerman, Iran
2 - Department of Computer Engineering, Kerman Branch, Islamic Azad University, Kerman, Iran
3 - Department of Electrical Engineering, Yazd Branch, Islamic Azad University, Yazd, Iran

Received: 2019-09-28 Accepted : 2019-09-28 Published : 2019-09-01

Keywords: Power Consumption, Ternary Half Adder, Armchair- Edge Graphene Nanoribbon, High-Speed,

Abstract :

Superior electronic properties of graphene make it a substitute candidate for beyond-CMOSnanoelectronics in electronic devices such as the field-effect transistors (FETs), tunnel barriers, andquantum dots. The armchair-edge graphene nanoribbons (AGNRs), which have semiconductor behavior,are used to design the digital circuits. This paper presents a new design of ternary half adder basedon graphene nanoribbon FETs (GNRFETs). Due to reducing chip the area and integrated circuit (IC)interconnects, ternary value logic is a good alternative to binary logic. Extensive simulations have beenperformed in Hspice with 15-nm GNRFET technology to investigate the power consumption and delay.Results show that the proposed design is very high-speed in comparison with carbon nanotube FETs(CNTFETs). The proposed ternary half adder based on GNRFET at 0.9V exhibiting a low power-delayproduct(PDP) of ~10-20 J, which is a high improvement in comparison with the ternary circuits basedon CNTFET, lately proposed in the literature. This proposed ternary half adder can be advantageous incomplex arithmetic circuits.