Efficient Adder Cell Using GDI Structure

Subject Areas : Majlesi Journal of Telecommunication Devices

Mansoureh Labafniya ¹ ( Isfahan University )
Mohammadreza Reshadinejhad ² ( Faculty of Computer Engineering, University of Isfahan, Isfahan, Iran )
Shahram Etemadi Broujeni ³ ( Faculty of Computer Engineering, University of Isfahan, Isfahan, Iran )

Received: 2018-09-18 Accepted : 2018-10-15 Published : 2018-09-01

Keywords: PDP, GDI, Adder,

Abstract :

Adder block is one of the major block in circuit design. inserting efficient adder block will cause having more efficient final design. In this paper improved GDI based adder will be designed. Proposed GDI based adder is more efficient in delay, performance and PDP. at last an adder/subtractor circuit will be designed.

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