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    List of Articles Mohammad Heydari


  • Article

    1 - High Efficiency Class E Power Amplifier with a New Output Network
    Majlesi Journal of Telecommunication Devices , Issue 11 , Year , Summer 2014
    In this paper a new cascode class E power amplifier with a driving stage of class F and novel output network is proposed. Class F power Amplifier is able to produce square waves, used in driving of main stage, owing to use main frequency and third frequency harmonic. Th More
    In this paper a new cascode class E power amplifier with a driving stage of class F and novel output network is proposed. Class F power Amplifier is able to produce square waves, used in driving of main stage, owing to use main frequency and third frequency harmonic. The proposed output network has also improved the parameters of circuit like efficiency, power added efficiency and output power with adding a capacitor and an inductor. In order to have more real results the circuit has been redesigned and simulated using spiral inductors.The simulation has taken place using 0.18 µm CMOS technology in ADS simulator software based on IEEE 802. 11b utilized in 2.4 GHz and WLAN applications. Proposed circuit delivers 23.1 dBm power; out of a 1.8 supply voltage to a 50Ω load with 84.3% efficiency and 80.4 % power added efficiency in 2.4 GHZ operating frequency. Manuscript profile

  • Article

    2 - A 10-Bit Low Power SAR ADC with a New Control Logic Using Monotonic Capacitor-Switching
    Majlesi Journal of Telecommunication Devices , Issue 11 , Year , Summer 2014
    A 10 bit Low power 666KS/s successive approximation register is presented. Monotonic capacitor-switching has been employed to reduce the switching energy power and total capacitance by 81% and 50% respectively. The ADC achieves an SNDR of 53.6 dB and ENOB of 8.61, while More
    A 10 bit Low power 666KS/s successive approximation register is presented. Monotonic capacitor-switching has been employed to reduce the switching energy power and total capacitance by 81% and 50% respectively. The ADC achieves an SNDR of 53.6 dB and ENOB of 8.61, while the power consumption  and  supply voltage are  0.83mW and 1.2V respectively. all simulations are carried out using cadence simulating software in 0.18um technology. Manuscript profile