Designing a Novel high-speed ternary-logic multiplier using GNRFET Technology

Subject Areas : Journal of Optoelectronical Nanostructures

Zahra Rohani ¹ (Computer Department of Computer Engineering, Kerman Branch, Islamic Azad University, Kerman, Iran.)
Azadeh Alsadat Emrani Zarandi ² (Department of Computer Engineering, Shahid Bahonar University of Kerman, Kerman, Iran.)

Received: 2022-02-18 Accepted : 2023-01-10 Published : 2023-01-01

Keywords: multiplier, Ternary logic, GNRFET, MVL circuit, PDP,

Abstract :

Abstract:
This paper presents a novel design of a ternary multiplier
based on graphene nanoribbon field-effect transistor
(GNRFET). GNRFET, as a new material with superior
physical and electronic properties, can be a good choice
instead of conventional devices such as metal–oxide–
semiconductor field-effect transistor (MOSFET) and
CNTFET. Moreover, multiple-valued logic (MVL) can
help to reduce area and decrease the computational step
compared with binary logic. We proposed a ternary
multiplier with the resistors to produce ternary logic. The
proposed multiplier performances are analyzed by
evaluating the delay, power, and power-delay product
(PDP), with 15 nm process technologies based on
GNRFET. The simulation results with HSPICE
demonstrate that the proposed design framework
outperforms state-of-the-art designs in circuit parameters.

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