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مقاله
1 - Controlling Ambipolar Current in a Junctionless Tunneling FET Emphasizing on Depletion Region ExtensionJournal of Optoelectronical Nanostructures , شماره 1 , سال 8 , بهار 2023Abstract:
For the first time, in this research, we introduce a
junctionless tunneling FET (J-TFET) on a uniform p+
starting junctionless FET to realize appreciable immunity
against inherent high ambipolar current (Iambچکیده کاملAbstract:
For the first time, in this research, we introduce a
junctionless tunneling FET (J-TFET) on a uniform p+
starting junctionless FET to realize appreciable immunity
against inherent high ambipolar current (Iamb). So, we
utilize two isolated gates with appropriate workfunctions
over the channel and drain regions to create P+IP+N+
charge distribution. This structure utilizes a space
between the gate-drain electrodes (SGD), to provide a
P+IP+N+ structure thanks to the effective electrons
depletion on the drain side. Increasing the SGD, further
effectively pulls up the bands near the interface between
the channel-drain regions, widens the tunneling width for
tunneling to occur, and thus in turn reduces the Iamb from
5.37×10-7 A/µm to 1.14×10-14 A/µm. Thus, we point out
that the proposed J-TFET can obtain on-current that
satisfies the expectation of logic applications with high
performance and Ioff that meets the specifications of low
power characteristics, a phenomenon that is rarely
accessible with conventional TFETs. پرونده مقاله -
مقاله
2 - Voltage Difference Technique in Junctionless Tunneling FET for Suppression of Ambipolar ConductionJournal of Optoelectronical Nanostructures , شماره 5 , سال 8 , زمستان 2023Abstract:
A detailed study of a novel configuration for junctionless tunneling FET (J-TFET) with extremely low off- (Ioff) and ambipolar current (Iamb) is reported in this paper. In order to achieve desirabl چکیده کاملAbstract:
A detailed study of a novel configuration for junctionless tunneling FET (J-TFET) with extremely low off- (Ioff) and ambipolar current (Iamb) is reported in this paper. In order to achieve desirable on/off current ratio (Ion/Ioff), we have employed voltage difference technique on the gate electrode based on the potential distribution benefits. Main and side gates with an optimum voltage difference creates a stepped potential profile along the channel. This raises the drain side’s bands, reduces the electric field, puts restriction on the flow of charge carriers, and finally remarkable reduction of Iamb from 6.52×10-10 A/µm to 1.14×10-17 A/µm. Also an extremely low subthreshold swing (SS) (22 mV/dec) is achieved thanks to the sharp transition from off- to the on-state. Finally we have investigated the electrical performance of the proposed device for sub-30 nm channel length to examine its immunity against short channel effects. Therefore, our approach renders the novel structure more desirable for the future low power applications. پرونده مقاله
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