Delay Model Estimation in RC-tree Circuits Based on the Power-lognormal Distribution
محورهای موضوعی : Journal of Computer & Robotics
Farshad Safaei
1
(Department of ECE, Shahid Beheshti University, Tehran, Iran)
کلید واژه: Power-lognormal distribution, Elmore delay, Circuit analysis, Physical synthesis, Moment matching, Simulation,
چکیده مقاله :
Computation of the second order delay in RC-tree based circuits is important during the design process of modern VLSI systems with respect to having tree structure circuits. Calculation of the second and higher order moments is possible in tree based networks. Because of the closed form solution, computation speed and the ease of using the performance optimization in VLSI design methods such as floor planning, placement and routing, the Elmore delay metric is widely implemented for past generation circuits. However, physical and logical synthesis optimizations require fast and accurate analysis techniques of the RC networks. Elmore first proposed matching circuit moments to a probability density function (PDF), which led to the widespread implementation of it in many networks. But the accuracy of Elmore metric is sometimes unacceptable for the RC interconnect problems in today’s CMOS technologies. The main idea behind our approach is based on the moment matching technique with the power-lognormal distribution and proposing the closed form formula for the delay evaluation of the RC-tree networks. The primary advantages of our approach over the past proposed metrics are the ease of implementation, reduction of the complexity and proposing an efficiency formula without referring to lookup tables. Simulation results confirmed that our method illustrates a good degree of accuracy and the relative average of errors is less than 20%.
[1] W. C. Elmore, The transient response of damped linear network with
particular regard to wideband amplifiers, J. Appl. Phys., vol. 19, pp.
55–63, 1948.
[2] C. J. Alpert, F. Liu, C. Kashyap, and A. Devgan, Delay and slew
metrics using the lognormal distribution, Computer-Aided Design,
vol. 20, pp. 382–385, 2003.
[3] L.T. Pillage and R.A. Rohrer, Asymptotic waveform evaluation for
timing analysis, IEEE Trans. Computer-Aided Design, vol. 9, no. 4,
pp. 352-366, 1990.
-100
100
300
500
700
900
1100
1300
1500
1700
1900
2100
2300
2500
2700
2900
3100
3300
3500
1 2 3 4 5 6
node
delay (ns)
Spice
Lognormal
WED
PRIMO
D2M
Elmore
PowerLognormal
100
200
300
400
500
600
700
800
900
1000
1100
1200
1300
1 2 3 4 5 6 7
node
delay (ps)
Lognormral
WED
PRIMO
D2M
Elmore
PowerLognormal
H-gamma
Spice
F. Safaei /Delay Model Estimation in RC-tree Circuits Based on the Power-lognormal Distribution.
82
[4] W on-Kwang Kal, and Seok-Y oon Kim, An analytical calculation method for delay time of RC-class interconnects, IEEE/ACM Conf., pp. 457–462, 2000. [5] C. J. Alpert, A. Devgan, and C. Kashyap, A two moment RC delay metric for performance optimization, Int. Symp. on Physical Design, pp. 69-74, 2000. [6] C. J. Alpert, A. Devgan, and C. V. Kashyap, RC delay metric for performance optimization, IEEE Trans. Computer-Aided Design, vol. 20, pp. 571–582, 2001. [7] L. T. Pileggi, Timing metrics for physical design of deep submicron technologies, in Proc. Int. Symp. Phys. Design, pp. 28–33, 1998. [8] R. Gupta, B. Tutuianu, and L. T. Pileggi, The Elmore delay as a bound for RC trees with generalized input signals, IEEE Trans. Computer- Aided Design, vol. 16, pp. 95–104, 1997. [9] A. B. Kahng and S. Muddu, A general methodology for response and delay computations in VLSI interconnects, Computer Science Department, University of California, Los Angeles, Tech. Rep. TR-940 015, 1994. [10] A.B. Kahng and S. Muddu, An analytic delay model for RLC interconnects, IEEE Trans. Computer-Aided Design, vol. 16, pp. 1507–1514, 1997. [11] J. Rubenstein, P. Penfield, Jr., and M. A. Horowitz, Signal delay in RC tree networks, IEEE Trans. on Computer- Aided Design, CAD-2, pp. 202-211, 1983. [12] F.Liu, C.Kashyap, C.J.Alpert, A Delay Metric for RC Circuits based on the Weibull Distribution, IEEE trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 23, pp. 443-447, 2004. [13] R. Kay and L. Pileggi, PRIMO: Probability interpretation of moments for delay calculation, in Proc. IEEE/ACM Design Automation Conf., pp. 463–468, 1998. [14] T. Lin, E. Acar, and L. Pileggi, H-gamma: An RC delay metric based on Gamma distribution approximation of the homogeneous response, in Proc. IEEE/ACM Int. Conf. Computer-Aided Design, pp. 19–25, 1998. [15] B. Tutuianu, F. Dartu, and L. Pileggi, An explicit RC-circuit delay approximation based on the first three moments of the impulse response, in Proc. IEEE/ACM Design Automation Conf., pp. 611–616, 1996. [16] A. B. Kahng And S. Muddu, Accurate Analytical Delay Models for VLSI Interconnects, University of California, Los Angeles, UCLA CS Dept. TR-950034, Sept. 1995. [17] http://www.matworld.wolfram.com
[18] http://www.itl.nist.gov
