List of Articles Ternary Logic

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  1 - Ternary DCVS Half Adder with Built-in Boosters
  Naghmeh Dehabadi Reza Faghih Mirzaee
  Differential Cascode Voltage Switch (DCVS) is one of the most well-known logic styles, which forms a robust structure. In addition, two complementary outputs are produced in this logic style at the same time. It has several unique attributes and different applications. More

  Differential Cascode Voltage Switch (DCVS) is one of the most well-known logic styles, which forms a robust structure. In addition, two complementary outputs are produced in this logic style at the same time. It has several unique attributes and different applications. This paper presents three comparable methods to design some ternary half adders, whose efficiencies are superior especially when they are put one after another in a cascading scenario. These cells are essential for the realization of larger arithmetic circuits. In the third proposed method, instead of ternary inverters, which consume considerable static power, built-in low-power binary boosters are exploited to reinforce driving power of the DCVS circuits. Simulation results by HSPICE and 32 nm Carbon Nanotube Field Effect Transistor (CNFET) technology demonstrate that the new adder cell with binary boosters operates 21.8% faster and consume 6.7% less power than the cell with ternary inverters in a real test bed. Furthermore, the final design is compared with three other ternary half adders. The new design is faster than all of them, and also consumes less power and energy than the previous DCVS half adder. Manuscript profile
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  2 - Introducing an Innovative D Flip-Flop for Designing Quaternary QCA Register
  Alireza Navidi Reza Sabbaghi-Nadooshan Massoud Dousti
  Taking advantage of advances in Nanotechnology, the quantum-dot cellular automata (QCA) has overcome many limitations that complementary metal-oxide-semiconductor (CMOS) had been confronted. Undesirable characteristics such as too many leakage currents limit the CMOS de More

  Taking advantage of advances in Nanotechnology, the quantum-dot cellular automata (QCA) has overcome many limitations that complementary metal-oxide-semiconductor (CMOS) had been confronted. Undesirable characteristics such as too many leakage currents limit the CMOS designs in nano dimensions. The idea of designing multiple-valued logic (MVL) systems rather than standard binary has gotten attractive to many designers. The application of MVL in the design of digital circuits offers so many advantages over traditional methods. D flip-flop is a primary sequential circuit in any register. In this paper, a novel quaternary D flip-flop based on introducing quaternary QCA (QQCA) is presented. The structure of our quaternary model is clarified. Also, we have proposed a 4-qubits register by utilizing the presented quaternary D flip-flop. Both circuits got simulated and evaluated by QCASim (quaternary edition). QCASim can illustrate the simulation result in a truth table and a waveform format. Our work got compared with other published works. The simulation results show that our proposed circuit is efficient in terms of latency and energy consumption. Manuscript profile
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  3 - High-Speed Penternary Inverter Gate Using GNRFET
  Mahdieh Nayeri Peiman Keshavarzian Maryam Nayeri
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