System and Circuit Design of a SC 2-1-1 MASH Sigma-Delta Modulator for High Resolution and Low Power Applications
Subject Areas : Journal of Optoelectronical Nanostructures
1 - Department of Engineering, Dayyer Branch, Islamic Azad University, Dayyer, Bushehr, Iran
Keywords: Multistage noise-shaping (MASH) sigma-delta modulator(SDM), Switched-Capacitor (SC), Low Power, High resolution ADC.,
Abstract :
In a switched-capacitor (SC) sigma-delta (∑∆) analog-to- digital converter (ADC) with a large oversampling ratio (OSR), the first integrator of the loop filter is typically the largest consumer of power in the ADC. Without the noise shaping effect for the first integrator, maintaining thermal noise floor below the overall accuracy requirement of the modulator puts severe demands on the operational transconductance amplifier (OTA) power consumption. The ability of the multistage noise-shaping (MASH) structures to provide stable conversion has been utilized in this design for high resolution of the converter.
In this paper, a MASH 2-1-1 switched capacitor sigma-delta converter (∑∆ ADC) with cascade structure has been presented. System level results show a signal to noise ratio SNR=146dB and a dynamic range of DR=151dB. Due to thermal and flicker noise of transistors and nonlinear effects of switches and Opamps, the SNR of circuit has decreased to SNR=133dB in circuit level. The high resolution of this type of the converter is ideal for applications in medical instruments and seismology. The designed sigma-delta converter has 24-bit resolution with 160Hz input signal bandwidth and consumes 26mW of power and SR=2.44V/μs.
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