Design and simulation of a low-noise low-power narrowband amplifier (LNA) in 180 nm CMOS technology

Subject Areas : Renewable energy

Esmail  Karimi ¹ (MSc - Saba Najafabad Compony, Najafabad, Iran)

Received: 2018-09-29 Accepted : 2019-10-16 Published : 2019-11-06

Keywords: gain, noise, low noise amplifier, matching network,

Abstract :

Abstrac: In this paper presented discussed to design a low noise amplifier (LNA) with inductor at source in TSMC 0.18um CMOS technology to 2.4 GHz. Cascode structure cause reduces the power consumption of the circuit[1]; the advantage of using cascade structure, increase the output impedance of the circuit impedance increases, increasing the circuit to follow. The circuit presented in this article a low noise amplifier cascoded with inductor in the source along with impedance matching network added in the input and output; and led to 1.6db noise figure and power consumption of 2.1mw achieved, respectively. Add matching networks to a greater degree of freedom in circuit for improved noise figure and power consumption and chip internal area is also reduced. Add the rest of the circuit in addition to reducing power and noise figure considerations in mind we have been able in the desired frequency and reflection coefficient in the input circuit respectively 20db and -12db achieved.

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