The present study is to investigate and design the logic gates and half adder circuits by using multilayer neural network. The parallel function of the neural networks allows their application in designing high-speed circuits. DSP and FPGA can be used in implementation of these circuits, which reduces the area of the circuit. This study first considers logic gates, and since half adder circuits are the basic systems in computing, a half adder circuit is designed in this study. To design a full adder circuit, two half adders and an OR gate can be used. The results of this study are consistent with the results of gates designed with other technologies such as CMOS and TTL, except that neural networks use less power. The results of the simulations are consistent with the results of logic gates and half adder designed with CMOS and TTL technologies. Matlab 2017 has been used in this paper for simulation. Manuscript profile

How to reconfigure a logic gate for a variety of functions is an interesting topic. In this paper, a different method of designing logic gates are proposed. Initially, due to the training ability of the multilayer perceptron neural network, it was used to create a new type of logic and full adder gates. In this method, the perceptron network was trained and then tested. This network was 100% accurate to determine outputs based on inputs. The results of comparison showed that the multilayer perceptron network had higher velocity and less delay in most cases, and used a smaller number of neurons, which will reduce the loss of power. Meanwhile, implementation of these gates will require less space through the multi-layer perceptron network. This method is prioritized in terms of the number of neurons and the level of implementation, and the speed of the detection of output compared to the other design. It also occupies less hardware space and is less complicated. Manuscript profile