An Integrated Temporal Partitioning and Mapping Framework for Improving Performance of a Reconfigurable Instruction Set Processor

Subject Areas : Journal of Computer & Robotics

Farhad Mehdipour ¹ , Hamid Noori ² , Morteza Saheb Zamani ³ , Hiroaki Honda ⁴ , Koji Inoue ⁵ , Kazuaki Murakami ⁶

1 - Faculty of Information Science and Electrical Engineering, Department of Informatics, Kyushu University, Fukuoka, Japan
2 - School of Electrical and Computer Engineering, University of Tehran, Tehran, Iran
3 - Department of Computer Engineering and IT, Amirkabir University of Technology (Tehran Polytechnic), Tehran, Iran
4 - Institute of Systems, Information Technologies and Nanotechnologies, Fukuoka, Japan
5 - Faculty of Information Science and Electrical Engineering, Department of Informatics, Kyushu University, Fukuoka, Japan
6 - Faculty of Information Science and Electrical Engineering, Department of Informatics, Kyushu University, Fukuoka, Japan

Received: 2008-12-05 Accepted : 2009-09-21 Published : 2010-01-10

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References
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Journal of Computer and Robotics 1 (2010) 1-11
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