Subject Areas : Journal of Optoelectronical Nanostructures
Mahdieh Nayeri 1 , peiman keshavarzian 2 , Maryam Nayeri 3
1 - Department of Computer Engineering, Kerman Branch, Islamic Azad
University, Kerman, Iran.
2 - Department of Computer Engineering, Kerman Branch, Islamic Azad
University, Kerman, Iran.
3 - Department of Electrical Engineering, Yazd Branch, Islamic Azad University,
Yazd, Iran.
Keywords:
Abstract :
[1] Moaiyeri, Mohammad Hossein, Reza Faghih Mirzaee, Akbar Doostaregan, Keivan Navi, and Omid Hashemipour. An universal method for designing low-power carbon nanotube FET-based multiple-valued logic circuits. IET Computers & Digital Techniques 7(4) (2013,Jul) 167-181.
[2] Mehrabani, Yavar Safaei, and Mohammad Eshghi. Noise and Process Variation Tolerant, Low-Power, High-Speed, and Low-Energy Full Adders in CNFET Technology. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24(11) (2016,Nov) 3268-3281.
[3] Sahoo, Subhendu Kumar, Gangishetty Akhilesh, Rasmita Sahoo, and Manasi Muglikar. High-Performance Ternary Adder Using CNTFET. IEEE Transactions on Nanotechnology 16(3) (2017, May) 368-374.
[4] Raychowdhury, Arijit, and Kaushik Roy. Carbon-nanotube-based voltage-mode multiple-valued logic design. IEEE Transactions on Nanotechnology 4(2) (2005, Mar) 168-179.
[5] Lin, Sheng, Yong-Bin Kim, and Fabrizio Lombardi. CNTFET-based design of ternary logic gates and arithmetic circuits. IEEE transactions on nanotechnology 10(2) (2011, Mar) 217-225.
[6] Moaiyeri, Mohammad Hossein, Keivan Navi, and Omid Hashemipour. Design and evaluation of CNFET-based quaternary circuits. Circuits, Systems, and Signal Processing 31(5) (2012,Oct) 1631-1652.
[7] Keshavarzian, Peiman, and Keivan Navi. Optimum quaternary galois field circuit design through carbon nano tube technology. . Presented at ADCOM 2007 at,[Online]. Available: https://ieeexplore.ieee.org/abstract/document/4425975/
[8] Sharifi, Fazel, Mohammad Hossein Moaiyeri, and Keivan Navi. A novel quaternary full adder cell based on nanotechnology. International Journal of Modern Education and Computer Science 7(3) (2015, Mar) 19.
[9] Sharifi, Fazel, Mohammad Hossein Moaiyeri, Keivan Navi, and Nader Bagherzadeh. Ultra-low-power carbon nanotube FET-based quaternary logic gates. International Journal of Electronics 103(9) (2016, Sep) 1524-1537.
[10] Sharifi Fazel, Mohammad Hossein Moaiyeri, Keivan Navi, and Nader Bagherzadeh. Quaternary full adder cells based on carbon nanotube FETs. Journal of Computational Electronics 14(3) (2015, Sep) 762-772.
[11] Cho, Geunho, and Fabrizio Lombardi. Design and process variation analysis of CNTFET-based ternary memory cells. Integration, the VLSI Journal 54(1) (2016, Jun) 97-108.
[12] Karimghasemi-rabori, Malakeh, and Peiman Keshavarzian. Design and Implementation of MOSFET Circuits and CNTFET, Ternary Multiplier in the Field of Galois. Journal of Advances in Computer Research 8(1) (2017, Feb) 129-142.
[13] Sahoo, Subhendu Kumar, Gangishetty Akhilesh, Rasmita Sahoo, and Manasi Muglikar. High-Performance Ternary Adder Using CNTFET. IEEE Transactions on Nanotechnology 16(3) (2017, May) 368-374.
[14] Moaiyeri, Mohammad Hossein, and Keivan Navi. "Robust Carbon Nanotube Field Effect Transistor-Based Penternary Logic Circuits." Journal of Computational and Theoretical Nanoscience 11(9) (2014, Sep) 2055-2062.
[15] Moaiyeri, Mohammad Hossein, Reza Faghih Mirzaee, Keivan Navi, and Omid Hashemipour. Efficient CNTFET-based ternary full adder cells for nanoelectronics. Nano-Micro Letters 3(1) (2011, Mar) 43-50.
[16] Moaiyeri, Mohammad Hossein, Akbar Doostaregan, and Keivan Navi. Design of energy-efficient and robust ternary circuits for nanotechnology. IET Circuits, Devices & Systems 5(4) (2011, Jul) 285-296.
[17] Keshavarzian, Peiman, and Keivan Navi. Universal ternary logic circuit design through carbon nanotube technology. International Journal of Nanotechnology 6(10-11) (2009, Jan) 942-953.
[18] Keshavarzian, Peiman, and Keivan Navi. Efficient carbon nanotube galois field circuit design. IEICE Electronics Express 6(9) (2009, May) 546-552.
[19] Sridharan, K., Sundaraiah Gurindagunta, and Vikramkumar Pudi. Efficient multi ternary digit Adder design in CNTFET technology. IEEE transactions on Nanotechnology 12 (3) (2013, May) 283-287.
[20] Lin, Sheng, Yong-Bin Kim, and Fabrizio Lombardi. Design of a ternary memory cell using CNTFETs. IEEE transactions on nanotechnology 11(5) (2012, Sep) 1019-1025.
[21] Moaiyeri, Mohammad Hossein, Reza Chavoshisani, Ali Jalali, Keivan Navi, and Omid Hashemipour. Efficient radix-r adders for nanoelectronics. International Journal of Electronics 103 (2) (2016, Feb) 281-296.
[22] Sharifi, Fazel, Mohammad Hossein Moaiyeri, Keivan Navi, and Nader Bagherzadeh. Ultra-low-power carbon nanotube FET-based quaternary logic gates. International Journal of Electronics 103(9) (2016, Sep) 1524-1537.
[23] Ebrahimi, Seyyed Ashkan, Mohammad Reza Reshadinezhad, Ali Bohlooli, and Mahyar Shahsavari. Efficient CNTFET-based design of quaternary logic gates and arithmetic circuits. Microelectronics Journal 53 (2016, Jul) 156-166
[24] J.Deng and H.-S. P.Wong, A compact SPICE model for carbon nanotube field-effect transistors including nonidealities and its application—part I: model of the
intrinsic channel region, IEEE Transactions on Electron Devices, 54 (12) (2007, Dec) 3186–3194.