Subject Areas : Smart buildings and renewable energies
1 - Department of Electrical Engineering, Aliabad katoul Branch, Islamic Azad University, Aliabad katoul , Iran
Keywords:
Abstract :
1. Ghosh, S., Bhadauria, V. (2021). High current efficiency single-stage bulk-driven subthreshold-biased class-AB OTAs with enhanced transconductance and slew rate for large capacitive loads, Analog Integrated Circuits and Signal Processing, 109, 403–433
2. Kumar, T. B., Kar, S. K., Boolchandani, D. (2020). A wide linear range CMOS OTA and its application in continuous-time filters , Analog Integrated Circuits and Signal Processing. 103, 283–290.
3. Wen, B., Zhang, Q., Zhao, X. (2019). A two-stage CMOS OTA with enhanced transconductance and DC-gain , Analog Integrated Circuits and Signal Processing. 98, 257–264
4. M.P. Garde, A.J. Lopez-Martin, R.G. Carvajal, J.A. Galan, J. Ramirez-Angulo, Super class AB RFC OTA using non-linear current mirrors, Electronics Letters. 54 (2018) 1317-1318.
5. Kulej , T., Khateb, F. (2020). A Compact 0.3-V Class AB Bulk-Driven OTA, IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 28, 224 - 232.
6. Pourashraf, S., Ramirez-Angulo, J., Roman-Loera, A., Gangineni, M. (2019). Gain and Bandwidth Enhanced Class-AB OTAs, IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS). 778- 781.
7. Ferreira, L. H. C. , Pimenta, T. C., Moreno, R. L. (2007) An ultra-low-voltage ultra-low-power CMOS Miller OTA with rail-to-rail input/output swing, IEEE Trans. Circuits Syst. II. 54, 843–847.
8. Raikos, G., Vlassis, S. (2011). Low-voltage bulk-driven input stage with improved transconductance, J. Circuit Theor.39, 39: 327–39.
9. Ferreira, L. H. C., Sonkusale, S. R. A. (2014). 60-dB gain OTA operating at 0.25-V power supply in 130-nm digital CMOS process, IEEE Trans. Circuits Syst. I, 61, 1609-1617.
10. Thandri, B.K., et.al. (2003). A robust feedforward compensation scheme for multistage operational trans-conductance amplifiers with no Miller Capacitors, IEEE J. of Solid-State Circuits. 38, 237-243.
11. Callewaert L. and Sansen, W. (1990). Class AB CMOS amplifiers with high efficiency, IEEE J. Solid-State Circuits. 25, 684–691.
12. Galan, JA., López-Martín, AJ., Carvajal, RG., Ramírez-Angulo, J., Rubia-Marcos, C. (2007). Super class-AB OTAs with adaptive biasing and dynamic output current scaling, IEEE Transactions on Circuits and Systems I: Regular Papers. 54, 449-457.
13. Lopez-Martin, A.J., Baswa, S., Ramirez-Angulo, J., Carvajal, R.G. (2005). Low-voltage Super Class AB CMOS OTA cells with very high slew rate and power efficiency, IEEE J. Solid-State Circuits. 40, 1068–1077.
14. Garde, M.P., Lopez-Martin, A., Carvajal, R.G., et al. (2018). Super class AB recycling folded cascode OTA, IEEE J. Solid-State Circuits. 53, 2614–2623.
15. Garde, M.P., Lopez-Martin, A., Carvajal, R.G., et al. (2018). Super class AB RFC OTA with adaptive local common-mode feedback, Electron. Lett.
16. Perez, A., Nithin, K., Bonizzoni, E., and Maloberti, F. (2009). Slew-rate and gain enhancement in two stage operational amplifiers, IEEE Circuits Syst. 2485–2488.
17. Sutula, S., Dei , M., Terés, L., Serra-Graells, F. (2016). Variable-Mirror Amplifier: A New Family of Process-Independent Class-AB Single-Stage OTAs for Low-Power SC Circuits, IEEE Transactions on Circuits and Systems I: Regular Papers. 63, 1101-1110.
18. Lopez-Martin, A., Algueta, J. M., Garde, M. P., Carvajal, R. G., & Ramirez-Angulo, J. (2020). 1-V 15-μW 130-nm CMOS Super Class AB OTA. IEEE International Symposium on Circuits and Systems (ISCAS), 1–4.
19. Roh, J. (2006). High-gain class-AB OTA with low quiescent current, Journal Analog Integr. Circuits Signal Process. 47, 225–228.
20. Assaad, R., and Silva-Martinez, J. (2009). The recycling folded cascode: A general enhancement of the folded cascode amplifier, IEEE Journal. Solid-State Circuits. 44, 2535–2542.
21. Yavari, M., and Moosazadeh, T. (2014). A single-stage operational amplifier with enhanced transconductance and slew rate for switched-capacitor circuits, Journal. Analog Integr. Circuits Signal Process. 79, 589–598.
22. Yavari, M. (2005). Hybrid cascode compensation for two-stage CMOS op-amps, IEICE trans. Electronics. 88, 1161-1165.
23. Anisheh, S. M., Shamsi, H. (2016). Two-stage class-AB OTA with enhanced DC gain and slew rate, International Journal of Electronics Letters. 5, 438-448.
24. Guo, J., Ho, M., Kwong, KY., Leung, KN. (2015). Power-area-efficient transient-improved capacitor-free FVF-LDO with digital detecting technique. Electronics Letters . 51, 94–96.
25. Pelgrom, M. J. M., Duinmaijer, A. C. J., Welbers, A. P. G. (1989). Matching Properties of MOS Transistors, IEEE Journal Solid-State Circuits. 24, 1433-1439.
26. Grasso, A. D., Palumbo, G., Pennisi, S. 2006. Three-stage CMOS OTA for large capacitive loads with efficient frequency compensation scheme, IEEE Trans. Circuits Syst. II, Exp. Briefs. 53, 1044-48.
27. Grasso, A. D., Palumbo, G., Pennisi, S. 2007. Advances in reversed Nested Miller compensation. IEEE Trans. Circuits Syst. I, Reg. Papers. 45, 1459-1470.