Effects of the Channel Length on the Nanoscale Field Effect Diode Performance

Subject Areas : Journal of Optoelectronical Nanostructures

arash rezaei ¹ , Bahram Azizollah-Ganji ² , Morteza Gholipour ³

1 - Department of Electrical & Computer Engineering, Babol Noshirvani University of Technology, Babol, Iran.
2 - Department of Electrical & Computer Engineering, Babol Noshirvani University of Technology, Babol, Iran.
3 - Department of Electrical & Computer Engineering, Babol Noshirvani University of Technology, Babol, Iran.

Received: 2017-12-05 Accepted : 2018-06-17 Published : 2018-06-01

Keywords: Field Effect Diode (FED), Side Contacted FED (S-FED), Band-To- Band-Tunneling (BTBT), ION/IOFF Ratio,

Abstract :

Field Effect Diode (FED)s are interesting device in providing the higher
ON-state current and lower OFF–state current in comparison with SOI-MOSFET
structures with similar dimensions. The impact of channel length and band-to-band
tunneling (BTBT) on the OFF-state current of the side contacted FED (S-FED) has been
investigated in this paper. To find the lowest effective channel length, this device is
simulated with 75, 55 and 35 nm channel length and the results obtained are presented
in this article. Our numerical results show that the ION/IOFF ratio can be varied from 104
to 100 for S-FED as the channel lengths decrease. We demonstrate that for channel
lengths shorter than 35 nm by considering the Band-to-Band tunneling model, the SFED
device does not turn off.

References:

REFERENCES
B. Yu, L. Wang, Y. Yuan, P. M. Asbeck and Y. Taur. Scaling of Nanowire Transistors. IEEE Transactions on Electron Devices. 55(11) (2008, Nov.) 2846-2858. Available: https://ieeexplore.ieee.org/document/4668604
[1] G. Joshi and A. Choudhary. Analysis of short channel effects in nanoscale MOSFETs. International Journal of Nanoscience 10(01n02) (2011) 275-278.
Available: http://www.worldscientific.com/doi/abs/10.1142/s0219581x11007910
[2] A.Kranti, T. M. Chung, and J.-P. Raskin. Gate length scaling and microwave performance of double gate nanotransistors. International Journal of Nanoscience 4(05n06) (2005) 1021-1024.
Available: https://www.worldscientific.com/doi/abs/10.1142/S0219581X05004005
[3] F. Raissii. A brief analysis of the field effect diode and breakdown transistor. IEEE Transactions on Electron Devices. 43(2) (1996, Feb) 362-365.
Available: https://ieeexplore.ieee.org/abstract/document/481742
[4] I.Sheikhian and F.Raissi. High-speed Digital family using Field Effect Diode. ELECTRONICS LETTERS. 39 (4) (2003) 345-347.
Available: https://ieeexplore.ieee.org/abstract/document/1184057
[5] I.Sheikhian and F.Raissi. An Improved Differential Comparator with Field Effect Diode Output Stage. Journal of circuts, systems, and computers.14 (5) (2005) 931-937.
Available: http://www.worldscientific.com/doi/abs/10.1142/S0218126605002684
[6] S. Cao, A. A. Salman, J. –H. Chun, S. G. Beebe, M. M. Pelella and R. Dutton. Design and characterization of ESD protection devices for high-speed I/O in advanced SOI technology. IEEE Trans.Electron Devices. 57(3) (2010) 644-653. Available: https://ieeexplore.ieee.org/abstract/document/5406085
[7] S. Cao, T. W. Chen, S. G. Beebe and R. W. Dutton, ESD Design chanllenges and strategies in deeply-scaled interated circuits, in Proc. IEEE 2009 Custom Integrated Circuits Conference (CICC), (2009) 681-688.
Available: https://ieeexplore.ieee.org/abstract/document/5280727
[8] M. Amirmazlaghani and F. Raissi, Memory cell using modified field effect diode. IEICE Electronic Express. 6(22) (2009)1582-1586.
Available: https://www.jstage.jst.go.jp/article/elex/6/22/6_22_1582/_article/-char/ja
[9] Yang Y, Gangopadhyay A, Li Q, Ioannou DE, Scaling of the SOI field effect diode (FED) for memory application, in Proc. InSemiconductor Device Research Symposium, (2009) 1-2.
Available: https://ieeexplore.ieee.org/abstract/document/5378045
[10] F. Jazayeri, B. Forouzandeh and F. Raissi, Low-power variable gain amplifire with UGBW based on nanoscale Field Effect Diode, IEICE Electronics Express. 6(1) (2009) 51-57.
Available: https://www.jstage.jst.go.jp/article/elex/6/1/6_1_51/_article/-char/ja
[11] F. Jazayeri, S. Soleimani-Amori, B. Ebrahimi, B. Forouzandeh, H. R. Ahmadi and F. Raissi. Pseudo-Linear automatic gain control system based on nanoscale field effect diode and SOI-MOSFET. Design and Test workshop 2008. (2008).
Available: https://ieeexplore.ieee.org/abstract/document/4802487
[12] I. Sheikhian and F. Raissi, Simulation results for nanoscale field effect diode. IEEE Trans. Electron Devices. 54(3) (2007) 613-617.
Available: https://ieeexplore.ieee.org/abstract/document/4114858
[13] N. Manavizadeh, F. Raissi, E. A. Soleimani, M. Pourfath, and S. Selberherr. Performance assessment of nanoscale field-effect Diodes. IEEE Transactions on Electron Devices. 58(8) (2011) 2378-2384.
Available: https://ieeexplore.ieee.org/abstract/document/5779716
[14] F. Raissi and I. Sheikhian. Nano-scale transistor device with large current handling capability, European Patent EP1 965437 (2008).
Available: https://patents.google.com/patent/EP1965437A1/en
[15] J. J. Sanchez, K. K. Hsueh, and T. A. Demassa. Drain-engineered hot-electron- resistant device structure: A review. IEEE Trans. Electron Devices. 36(6) (1989, Jul.) 1125–1132.
Available: https://ieeexplore.ieee.org/abstract/document/24357
[16] International Device Simulation Software, SILVACO TCAD. (2010).