A QCA Fault-Tolerant Reversible Full Adder
Subject Areas : International Journal of Smart Electrical EngineeringSeyed Amir Hossein Foroutan 1 , Reza Sabbaghi-Nadooshan 2 * , Majid Mohammadi 3 , Mohammad Bagher Tavackoly 4
1 - Department of Electronics, Islamic Azad Uinversity of Arak
2 - Department of Electrical Engineering, Central Tehran Branch, Islamic Azad University, Tehran, Iran.
3 - School of Computer Science, shahid Bahonar university, Kerman, Iran
4 - Department of Electronics, Islamic Azad Uinversity of Arak
Keywords: Reversible gate, Intelligent system, Fault-tolerant,
Abstract :
Today, the use of CMOS technology for the manufacture of electronic ICs has faced many limitations. Many alternatives to CMOS technology are offered and made every day. Quantum-dot cellular automata (QCA) is one of the most widely used. QCA gates and circuits have many advantages including small size, low power consumption and high speed. On the other hand, using special digital gates called reversible gates, a series of reversible circuits can be built that have their own advantages and applications in digital design. Reversible circuits can be implemented by QCA gates. One of the most important reversible gates implemented by QCA gates is QCA1 gate. In this paper we have proposed a reversible full adder using QCA1 gates which has fault-tolerant structure. This structure has better indexes such as area and latency than similar ones. Reversible circuits are a kind of intelligent systems; because the possible system error can be distinguished by the output values.
[1] C.S. Lent, P.D. Tougaw, W. Porod, G.H. Bernstein, “Quantum cellular automata” - Nanotechnology, Volume 49, Issue 4, 1993
[2] B. Sen, M. Dutta, R. Mukherjee, R. Kumar, “Towards the design of hybrid QCA tiles targeting high fault tolerance” - Journal of Computational Electronics, Volume 15, Issue 2, pp 429-445, June 2016
[3] B. Sen, R. Mukherjee, R. Kumar, B.K. Sikdar, “Design of fault tolerant universal logic in QCA” - Fifth International Symposium on Electronic System Design, 2014
[4] F. Ahmad, “An optimal design of QCA based 2n:1/1:2n multiplexer/demultiplexer and its efficient digital logic realization” – Microprocessors and Microsystems, Volume 56, 2018
[5] V. J. Arulkarthick, A. Rathinaswamy, K. Srihar, “Design of BCD adder with five input majority gate for QCA” - Microprocessors and Microsystems, 2020
[6] A. Kamaraj, P. Marichamy, “Design of integrated reversible fault-tolerant arithmetic and logic unit” – Journal of Microprocessors and Microsystems, Volume 69, 2019
[7] M. Kianpour, R. Sabbaghi, “A novel quantum-dot cellular automata X-bit × 32-bit SRAM” - IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 24, Issue 3, March 2016
[8] S. U. Qadri, Z. A. Bangi, “Design and implementation of cryptographic element with low power dissipation in QCA” – Journal of Nanomaterials, Volume 8, 2019
[9] D. Kumar, D. Mitra, “Design of a practical fault tolerant adder in QCA” - Journal of Microelectronics, Volume 53, 2016
[10] M. Gosvami, B. Sen, B.K. Sikdar, “Design of low power 5-input majority voter in quantum-dot cellular automata with effective error resilience” - Sixth International Symposium on Embedded Computing and System Design (ISED), 2016
[11] Mo. Mohammadi, Ma. Mohammadi, S. Gorgin, “An efficient design of full adder in quantum-dot cellular automata (QCA) technology” - Journal of Microelectronics, Volume 50, Issue C, April 2016
[12] N. safoev, J. C. Jeon, “A novel controllable inverter and adder/subtractor in quantum-dot cellular automata using cell interaction based XOR gate” – Journal of Microelectronic Engineering, Volume 222, 2020
[13] M. Javid, K. Mohamadi, “Characterization and tolerance of QCA full adder under missing cells defects” - Fifth International Conference on MEMS, NANO and Smart Systems (ICMENS), 2009
[14] X. Yang, L. Cai, S. Wang, Z. Wang, C. Feng, “Reliability and performance evaluation of QCA devices with rotation cell defect” - IEEE Transactions on Nanotechnology, Volume 11 No 5, 2012
[15] R. Mukherjee, S. Tripathi, S. Sen, B. Sen, “Characterization and analysis of single electron fault of QCA primitives” - International Conference on Microelectronics, Computing and Communications (MicroCom), 2016
[16] M. abdollah-Al-Shafi, M.D. Shifatul Islam, A.N. Bahar, “A review on reversible logic gates and it’s QCA implementation” - International Journal of Computer Applications, Volume 128, No 2, 2015
[17] D. Banik, J. Mathew, H. Rahamant, “Testable reversible latch in molecular quantum dot cellular automata framework” - IEEE Annual India Conference (INDICON), 2016
[18] J.C. Das, D. De, “Nanocommunication network design using QCA reversible crossbar switch” – Journal of Nanocommunication networks, Volume 13, September 2017
[19] X. Ma, J. Huang, C. Metra, F. Lombardi, “Testing reversible 1D arrays for molecular QCA” - 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2006
[20] J.C. Das, D. De, T. sadhu, “A novel low power nanoscale reversible decoder using quantum-dot cellular automata for nanocommunication” - Third International Conference on Devices, Circuits and Systems (ICDCS), 2016
[21] F. Ahmad, S. Ahmad, V. Kakkar, “Modular design of ultra-efficient reversible full adder-subtractor in QCA with power dissipation analysis” - International Journal of Theoretical Physics, Volume 59, June 2018
[22] B. Sen, M. Dutta, M. Goswami, B.K. Sikdar, “Modular design of testable reversible ALU by QCA multiplexer with increase in programmability” - Journal of Microelectronics, No 11, 2014
[23] S. Hashemi, M. R. Azghadi, K. Navi, “Design and analysis of efficient QCA reversible adders” - Journal of Supercomputing, Volume 75, 2019
[24] R. Farazkish, S. Sayedsalehi, K. Navi, “Novel design for quantum dots cellular automata to obtain fault tolerant majority gate” – Journal of Nanotechnology, 2012
[25] S. Srivastava, A. Asthana, S. Bhanja, S. Sarkar, “QCAPro-an error-power estimation tool for QCA circuit design” - IEEE International Symposiumof Circuits and Systems (ISCAS), 2011