A 10-Bit Low Power SAR ADC with a New Control Logic Using Monotonic Capacitor-Switching

Subject Areas : Majlesi Journal of Telecommunication Devices

Morteza Rahimi ¹ (Department of Electrical Engineering, Sadjad University of Technology, Mashhad, Iran)
Abbas Golmakani ² (Department of Electrical Engineering, Sadjad University of Technology, Mashhad, Iran)
Mohammad Ali Heydari ³ (Department of Electrical Engineering, Sadjad University of Technology, Mashhad, Iran)
Mohammad Hossein Mesgarof ⁴ (Department of Electrical Engineering, Sadjad University of Technology, Mashhad, Iran)

Received: 2014-09-13 Accepted : 2014-09-14 Published : 2014-09-01

Keywords: en,

Abstract :

A 10 bit Low power 666KS/s successive approximation register is presented. Monotonic capacitor-switching has been employed to reduce the switching energy power and total capacitance by 81% and 50% respectively. The ADC achieves an SNDR of 53.6 dB and ENOB of 8.61, while the power consumption  and  supply voltage are  0.83mW and 1.2V respectively. all simulations are carried out using cadence simulating software in 0.18um technology.

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