High Level Modeling of AES in QCA Technology

محورهای موضوعی : Majlesi Journal of Telecommunication Devices

Mojdeh Mahdavi ¹ (Department of Electronics, Shahr-e-Qods Branch, Islamic Azad University, Tehran, Iran)
Mohammad Amin Amiri ² ()

تاریخ دریافت : 1397/08/16 تاریخ پذیرش : 1397/09/10 تاریخ انتشار : 1397/09/10

کلید واژه: Modeling, Advanced Encryption Standard, Quantum Cellular Automata,

چکیده مقاله :

Lent has created QCA nanoscale devices by merging the cellular automata and quantum electronics. These devices are capable of achieving very high switching speeds and very low electrical power consumption. AES block cipher is now used worldwide. This algorithm is based on the Rijndael cipher which was submitted as a proposal to NIST during the AES selection process. The implementation of this cryptographic algorithm in QCA technology is presented in this paper. On the other hand, the QCADesigner software which is used to simulate QCA circuits is sensitive to the QCA cell count, inputs and outputs. It seems that by increasing the QCA cell count, inputs and outputs, the simulation time will increase and sometimes the simulation will be impossible. A higher level modeling of QCA circuits by VHDL hardware description language and simulation of these models by ModelSim software is presented in this paper to solve the mentioned problem. It is shown that the QCA implementation of the AES algorithm with key, input and output length of 128 bits is easily modeled and simulated in ModelSim software. The implementation results of various implementation methods are also compared in this paper for AES algorithm. It is illustrated that the QCA implementation of this algorithm is the most efficient implementation among existing methods.

منابع و مأخذ:

1] C.S. Lent, P.D. Tougaw, W. Porod and G.H. Bernstein; “Quantum cellular automata,” Nanotechnology, Vol.4, pp.49–57 (1993)

[2] K. Walus, V. Dimitrov, G.A. Jullien and W.C. Miller; “QCADesigner: A CAD Tool for an Emerging Nano-Technology,” Micronet Workshop, Available online (2003)

[3] Marco Ottavi, Luca Schiano and Fabrizio Lombardi; “HDLQ: A HDL Environment for QCA Design,” ACM J. on Emerging Tech. in Computing Systems, Vol.2, pp. 243–261 (2006)

[4] T. Teodosio and L. Sousa; “QCA-LG: A tool for the automatic layout generation of QCA combinational circuits,” Norchip Conference (2007)

[5] M.A. Amiri, M. Mahdavi and S. Mirzakuchaki; “QCA Implementation of A5/1 Stream Cipher,” 2nd Int. Conf. on Advances in Circuits, Elec. and Micro-elect. (2009)

[6] M.A. Amiri, S. Mirzakuchaki and M. Mahdavi; “Logic-Based QCA Implementation of a 4×4 S-Box,” Informacije MIDEM, Vol.40, pp. 197-203 (2010)

[7] M.A. Amiri, S. Mirzakuchaki and M. Mahdavi; “Cryptography in Quantum Cellular Automata,” Cellular Automata - Innovative Modelling for Science and Engineering, Dr. Alejandro Salcido (Ed.), InTech (2011)

[8] Karim, Fazal, and Konrad Walus; “Efficient simulation of correlated dynamics in quantum-dot cellular automata,” IEEE Trans. on Nanotechnology, Vol.13, pp.294-307 (2014)

[9] Yang, Xiaokuo, Li Cai, S. Wang, Zhuo Wang and C. Feng; “Reliability and performance evaluation of QCA devices with rotation cell defect,” IEEE Transactions on Nanotechnology, Vol.11, pp. 1009-1018 (2012)

[10] Das, Kunal and Debashis De; “A study on diverse nanostructure for implementing logic gate design for QCA,” International Journal of Nanoscience, Vol.10, pp. 263-269 (2011)

[11] V. Vankamamidi, M. Ottavi and F. Lombardi; “Two-dimensional schemes for clocking/timing of QCA circuits,” IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., Vol.27, pp. 34-44 (2008)

[12] K. Hennessy and C. S. Lent; “Clocking of Molecular Quantum-dot Cellular Automata,” J. Vac. Sci. Technol., Vol.19, pp. 1752-1755 (2001)

[13] D. Tougaw and M. Khatun; “A scalable signal distribution network for quantum-dot cellular automata,” IEEE Transactions on Nanotechnology, Vol.12, pp. 215-224 (2013)

[14] J. S. Chandra, K. Suresh and B. Ghosh; “Clocking Scheme Implementation for Multi-Layered Quantum Dot Cellular Automata Design,” Journal of Low Power Electronics, Vol.10, pp. 272-278 (2014)

[15] Advanced Encryption Standard (AES), http://www.csrc.nist.gov/publications/fips/fips197/fips-197.pdf

[16] Minjun Yan; “Electric Field Detection by Electrostatic Force Microscopy for Clocking Quantum dot Cellular Automata Molecules,” PhD Thesis, University of Notre Dame, Notre Dame, Indiana (2006)

[17] Mo Liu; “Robustness and Power Dissipation in Quantum-dot Cellular Automata,” PhD Thesis, University of Notre Dame, Notre Dame, Indiana, (2006)

[18] Huang Yin, He Debiao, Kang Yong and Fei Xiande, “High-speed ASIC implementation of AES supporting 128/192/256 bits,” International Conference on Test and Measurement (2009)

[19] Tim Good and Mohammad Benaissa, “692-nW Advanced Encryption Standard (AES) on a 0.13-µm CMOS,” IEEE Transactions on VLSI Systems, Vol.18, no. 12, pp. 1753-1757 (2010)