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Open Access Article
1 - Design and Simulation of 4 Transistors and 2 Memristors Memory with the Least Power and Power-Delay Product
Keramat Karami Sayed Mohammad Ali Zanjani Mehdi DolatshahiMemristor, as a fundamental element of SRAM and DRAM memories, can effectively reduce startup time and power consumption of the circuits. Non-volatility, high density of the final circuit, and reduction of power delay product (PDP) are some of the significant facts of m MoreMemristor, as a fundamental element of SRAM and DRAM memories, can effectively reduce startup time and power consumption of the circuits. Non-volatility, high density of the final circuit, and reduction of power delay product (PDP) are some of the significant facts of memristor circuits, which has led to the suggestion of a memory cell including and four transistors and two memristors (4T2M) in this paper. In order to simulate the proposed memory cell, the length of memristors has been selected 10 nm, and their on/off state resistors have been selected 250 Ω and 10 KΩ respectively. In addition, the proposed memory cell MOS transistors are simulated by the 32 nm CMOS PTM model. Simulation in the HSPICE software with 1V supply voltage and comparison with two conventional six-transistor (6T) and two transistors-two memory (2T2M) cells show that the use of memristors has made the proposed memory cell and 2T2M cell non-volatile. Moreover, the power consumption of the proposed circuit has decreased by 99.8% and 57.2%, compared to the previous two circuits respectively, and the power average delay product has also improved by 99.4% and 26.7%, respectively; however, the writing delay of this cell and 2T2M cell increased by 400% and 218% compared to 6T cell, respectively. Manuscript profile -
Open Access Article
2 - Voltage THD Minimization in Multilevel Cascade Inverters Using Repetitive Quadratic Programming
Mehdi Mohammadzamani Majid Moazzami Iman SadeghkhaniThe multilevel cascade inverter is one of the most widely used power-electronics based interfaces in electrical distribution systems. Due to high losses and harmonics, the switching frequency of the inverter should be low in medium and high power applications. For this MoreThe multilevel cascade inverter is one of the most widely used power-electronics based interfaces in electrical distribution systems. Due to high losses and harmonics, the switching frequency of the inverter should be low in medium and high power applications. For this reason, the conventional carrier wave-based sinusoidal pulse modulation (PWM) and space vector PWM that have high switching frequencies cannot be used in these applications. The optimal PWM methods for inverters with step modulation result in lower total harmonic distortion (THD) in output voltage than other common modulation methods. However, one of the major disadvantages of these methods is that the optimal switching angles should be determined using the switching table, limiting the application of the optimal PWM. This paper proposes a method for determination of switching angles by using the iterative quadratic programming method. In each iteration, the proposed method calculates the switching angles by solving the quadratic sub equations with equality constraints and linear equations. Also in the appropriate conditions, global and asymmetric convergences are faster, more accurate, and more efficient, and there is no need for much time and memory for switching angles determination. The optimum switching angles minimize the switching frequency, switching losses, and THD in voltage and current of a three-phase cascade multilevel inverter with step modulation. Also, the power circuit breakers are switched on and off only once in each period. The effectiveness of the proposed method is evaluated through simulation case studies in MATLAB environment. Manuscript profile -
Open Access Article
3 - Coordination of Switchable Capacitor Banks and Dynamic Network Reconfiguration for the Improvement of Distribution Network Operation integrated with Renewable Energy Resources
Ramin Borjali Navesi Daryoosh Nazarpour Akbari Reza Ghanizadeh Payam AlemiWind turbines and photovoltaic arrays are the most prominent and widely used intermittent Distributed Generations (DGs). Due to the right-of-way, environmental, economical and other restrictions, the connection of this type of DGs to the preferred point of the distribut MoreWind turbines and photovoltaic arrays are the most prominent and widely used intermittent Distributed Generations (DGs). Due to the right-of-way, environmental, economical and other restrictions, the connection of this type of DGs to the preferred point of the distribution network is very difficult or in some cases impossible. Therefore, because of non-optimal locations, they may cause a voltage rise at the Points of Common Coupling (PCCs). In this paper, a coordinated design of Switchable Capacitor Banks (SCBs) with dynamic reconfiguration of the distribution network is proposed to avoid low and high voltage violations. For this purpose, distribution network reconfiguration is implemented to mitigate voltage rise at PCCs and Capacitor Banks (CBs) to solve the low voltage problem. A novel method is presented for determining the optimal size of CBs. The proposed Capacitor Sizing Method (CSM) effectively determines the optimal values of reactive power for the given nodes. The optimal locations of SCB are determined using particle swarm optimization algorithm. The 24–hour reactive power curve optimized by the proposed method plays a pivotal role in designing SCBs. The simulation results show that the implementation of the dynamic network reconfiguration and SCBs placement is required to maintain a standard voltage profile for better employment of DG embedded distribution networks. Manuscript profile -
Open Access Article
4 - The Stable and Anti-Jamming Algorithm for Synchronization of Hybrid Spread Spectrum System
Hamed Ahmadian Yazdi Mohammad Ali Pourmina Afrooz HaghbinHybrid Spread Spectrum (HSS) link is a suitable and robust physical layer structure for the tactical ad-hoc network. In this link, synchronization consists of two stages: Frequency hopping pattern synchronization and direct sequence code synchronization. In the presence MoreHybrid Spread Spectrum (HSS) link is a suitable and robust physical layer structure for the tactical ad-hoc network. In this link, synchronization consists of two stages: Frequency hopping pattern synchronization and direct sequence code synchronization. In the presence of jamming, the use of the conventional fixed-threshold detection method increases the false alarm rate. Increasing the false alarm rate increases synchronization time in the HSS link. To solve this problem, the noise and jamming power estimator block is usually used at the receiver. Threshold value is adjusted instantaneously based on the estimated power in this method. This method has a high computational load and hardware complexity, and error in estimating noise and jamming power leads to an increase in the false alarm rate. In this paper, the proposed synchronization algorithm of the hybrid spread spectrum system is presented as an adaptive threshold, based on the statistical characteristics of the received signal. In the proposed algorithm, the threshold value is changed adaptively so that the false alarm rate remains constant at a minimum value. The theoretical analysis and simulation results show that the proposed algorithm can improve the detection probability and false alarm rate and reduce the synchronization time in the presence of a jamming compared to the conventional fixed threshold method. Manuscript profile -
Open Access Article
5 - Improving the Performance of Cadmium Telluride-Based Solar Cells Using ZnCdS/NiO and ZnO Compounds for ETL/HTL and TCO Layers
Ebrahim Amoupour Javad Hasanzadeh Ali Abdolahzadeh Ziabari Peyman AzimiCadmium telluride (CdTe) solar cell is known for its high efficiency, low cost and high stability. In this paper, simulation of CdTe based solar cell (ZnO/ZnCdS/CdTe/NiO/Al) has been presented. ZnCdS, NiO and ZnO layers have been used as electron/hole transport layer (E MoreCadmium telluride (CdTe) solar cell is known for its high efficiency, low cost and high stability. In this paper, simulation of CdTe based solar cell (ZnO/ZnCdS/CdTe/NiO/Al) has been presented. ZnCdS, NiO and ZnO layers have been used as electron/hole transport layer (ETL/HTL) and transparent conductive oxide (TCO) layer, respectively. SCAPS-1D simulation software was used to evaluate the performance of the modelled multijunction CdTe solar cell. This software is capable of analyzing the efficiency with different parameters of cadmium telluride solar cell. The impact of thickness, carrier concentration, defect density of the CdTe, and ZnCdS/ CdTe interface defect density on the solar cell performance was also investigated. The optimized solar cell demonstrated a maximum power conversion efficiency (PCE) of 26.3 % with open circuit voltage (VOC) of 1.095 V, short circuit current density (JSC) of 27.22 mA/cm2 and FF of 88.14 % that shows huge promise in low-cost solar energy harvesting. Manuscript profile -
Open Access Article
6 - A New Step-Down DC-DC Converter with Synchronous Rectifier and Soft Switching Conditions
Rohollah Khorammi Majid Delshad Hadi SaghafiIn this paper, a high step down converter with a synchronous rectifier is presented, so that both the main switch and the rectifier switch operate under soft switching condition. Since the proposed converter gain is much lower than the conventional buck converter, it do MoreIn this paper, a high step down converter with a synchronous rectifier is presented, so that both the main switch and the rectifier switch operate under soft switching condition. Since the proposed converter gain is much lower than the conventional buck converter, it does not have the problems of these converters such as narrow duty cycle, high voltage stress and high switch current, etc. In the proposed converter, the voltage stress on the switch is reduced, so a switch with lower drain-source resistance (RDS(ON)) can be used and the conduction losses are reduced. On the other hand, because the diodes of the circuit are switched off under zero current switching condition, do not have the problem of reverse recovery. Switching losses of the switches are also greatly reduced due to operating under zero voltage switching conditions. The proposed converter has been thoroughly analyzed and a practical 120 W prototype has been made to prove the correctness of the circuit analysis. Manuscript profile
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