Designing a New Gate-Diffusion Input in Quantum-Dot Cellular Automata Technology

Subject Areas : Digital electronic systems

Hamidreza Sadrarhamii ¹ , Sayed Mohammadali Zanjani ² , Mehdi Dolatshahi ³ , Behrang Barekatain ⁴

1 - Department of Computer Engineering- Najafabad Branch, Islamic Azad University, Najafabad, Iran
2 - Smart Microgrid Research Center- Najafabad Branch, Islamic Azad University, Najafabad, Iran
3 - Department of Electrical Engineering- Najafabad Branch, Islamic Azad University, Najafabad, Iran
4 - Big data Research Center- Najafabad Branch, Islamic Azad University, Najafabad, Iran

Received: 2022-06-30 Accepted : 2022-10-30 Published : 2022-10-30

Keywords: nanotechnology, Low power, polarization, Quantum-dot cellular Automata, gate diffusion input,

Abstract :

Quantum-dot cellular automata (QCA) is a modern technology, which has higher speed, lower power consumption, higher density, and lower complexity than conventional technologies, such as CMOS. Moreover, the gate diffusion input (GDI) technique has been successful in reducing complexity, area, and energy consumption in low-power circuit designs. In this technique, a wide range of complex logic functions can be implemented using only two transistors as the main block. In this study, a QCA-based GDI block is proposed using only 11 cells as a standard design unit that can be used to implement basic functions such as AND, OR, MUX, BUFFER, NOT and XOR in digital circuits. QCADesigner simulations of the functions in 18 nm technology indicate the superior performance of the proposed block with only one clock cycle delay in performing the operations. Moreover, the power consumption analysis of the designed circuits is performed using QCADesigner. The advantages of the proposed circuit compared to previous designs are 31% reduction in cell count, 50% smaller surface area, and 17% reduction in total energy loss.

References:

[1] E. Abiri, M.R. Salehi, A. Darabi, "Design and evaluation of low power and high speed logic circuit based on the modified gate diffusion input (m-GDI) technique in 32nm CNTFET technology", Proceeding of the IEEE/ICEE, pp. 67–72, Tehran, Iran, May 2014 (doi: 10.1109/IranianCEE.2014.6999505).

[2] M. Sadeghi, K. Navi, M. Dolatshahi, "Novel efficient full adder and full subtractor designs in quantum cellular automata", Journal of Supercomputing, vol. 76, no. 3, pp. 2191–2205, March 2020 (doi: 10.1007/s11227-019-03073-4).

[3] K.Thenmozhi, J.B.B. Rayappan, R. Amirtharajan, P. Praveenkumar, "MUX induced ring oscillators for encrypted nano communication via quantum dot cellular automata", Nano Communication Networks, vol. 27, Article Number: 100338, March 2021 (doi: 10.1016/j.nancom.2020.100338).

[4] A. Ghorbani, M. Dolatshahi, S.M. Zanjani, B. Barekatain, "A new low power, area efficient 4-bit carry look ahead adder in CNFET technology", Majlesi Journal of Electrical Engineering, vol. 16, no. 1, pp. 65–73, March 2022 (doi: 10.52547/mjee.16.1.65).

[5] A. Ghorbani, M. Dolatshahi, S.M. Zanjani, B. Barekatain, "A new low-power dynamic-GDI full adder in CNFET technology", Integration, vol. 83, pp. 46–59, March 2022 (doi: 10.1016/j.vlsi.2021.12.001).

[6] A. Fish, A. Morgenshtein, I.A. Wagner, "Gate-diffusion input (GDI): A power-efficient method for digital combinatorial circuits", IEEE Trans. on Very Large Scale Integration (VLSI), vol. 10, no. 5, pp. 566–581, Oct. 2002 (doi: 10.1109/TVLSI.2002.801578).

[7] E. Abiri, A. Darabi, A. Sadeghi, "Gate-diffusion input (GDI) method for designing energy-efficient circuits in analogue voltage-mode fuzzy and QCA systems", Microelectronics Journal, vol. 87, pp. 81–100, May 2019 (doi: 10.1016/j.mejo.2019.04.001).

[8] C. Lent, S. Craig, P.D. Tougaw, W. Porod, G.H. Bernstein, "Quantum cellular automata", Nanotechnology, vol. 4, no. 1, pp. 49-67, 1993 (doi: 10.1088/0957-4484/4/1/004).

[9] P. Metku, K.K. Kim, M. Choi, "Novel area-efficient null convention logic based on cmos and gate diffusion input (Gdi) hybrid", Journal of Semiconductor Technology and Science, vol. 20, no, 1, pp. 127-134, Feb. 2020 (doi: 10.5573/JSTS.2020.20.1.127).

[10] T.N. Sasamal, K. Ashutosh, M. Anand, "Quantum-dot cellular automata based digital logic circuits : A design perspective", Singapore, Springer, Dec. 2019 (ISBN: 978-9811518249).

[11] A. Morgenshtein, A. Fish, I.A. Wagner, "An efficient implementation of D-flip-flop using the GDI techni­que", Prpceeding of the IEEE/ISCAS, vol. 2, pp. 673-676, Vancouver, BC, Canada, May 2004 (doi: 10.1109/ISCA­S.20­04.1329361)

[12] Hashemi, Sara, M.R. Azghadi, K. Navi, "Design and analysis of efficient QCA reversible adders.", The Journal of Supercomputing, vol. 75, pp. 2106-2125, April 2019 (doi: 10.1007/s11227-018-2683-0).

[13] I. Hook, R. Loyd, S.C. Lee, "Design and simulation of 2-D 2-dot quantum-dot cellular automata logic", IEEE Trans. on Nanotechnology, vol. 10, no. 5, pp. 996-1003, Sept. 2011 (doi: 10.1109/TNANO.20­10.2­092­7­89).

[14] B. Sen, M. Goswami, S. Mazumdar, B.K. Sikdar, "Towards modular design of reliable quantum-dot cellular automata logic circuit using multiplexers", Computers and Electrical Engineering, vol. 45, pp. 42–54, July 2015 (doi: 10.1016/j.compeleceng.2015.05.001).

[15] M. Noorallahzadeh, M. Mosleh, "Parity-preserving reversible flip-flops with low quantum cost in nanoscale", The Journal of Supercomputing, vol. 76, no. 3, pp.2206-2238. March 2020 (doi: 10.1007/s11227-019-03074-3).

[16] S. Hashemi, R. Farazkish, K. Navi, "New quantum dot cellular automata cell arrangements", Journal of Computational and Theoretical Nanoscience, vol. 10, no. 4, pp. 798–809, April 2013 (doi: 10.1166/jctn.2­013.2­773.

[17] W. Lei, G. Xie, "Novel designs of full adder in quantum-dot cellular automata technology", The Journal of Supercomputing, vol. 74, no. 9, pp. 4798–4816, Sept. 2018 (doi: 10.1007/s11227-018-2481-8).

[18] R. Tiwari, D. Bastawade, P. Sharan, A. Kumar, "Performance Analysis of Reversible ALU in QCA", Indian Journal of Science and Technology, vol. 10, no. 29, pp. 1–5, Aug. 2017 (doi: 10.17485/ijst/2017/v1­0i29/1­17­3­24).

[19] J.C. Jeon, "Low-complexity QCA universal shift register design using multiplexer and D flip-flop based on electronic correlations", The Journal of Supercomputing, vol. 76, no. 8, pp. 6438–6452, Aug. 2020 (doi: 10­.1­0­07/s­11227-019-02962-y).

[20] J. Maharaj, S. Muthurathinam, "Effective RCA design using quantum dot cellular automata", Microproce­ssors and Microsystems, vol. 73, Article Number: 102964, March 2020 (doi: 10.1016/j.micpro.2019.102964).

[21] S.H. Shin, J.C. Jeon, K.Y. Yoo, "Design of wire-crossing technique based on difference of cell state in quantum-dot cellular automata", International Journal of Control and Automation, vol. 7, no. 3, pp. 153–164, April 2014 (doi: 10.14257/ijca.2014.7.4.14).

[22] M. Abdullah-Al-Shafi, A.N. Bahar, "An architecture of 2-dimensional 4-dot 2-electron QCA full adder and subtractor with energy dissipation study", Active and Passive Electronic Components, vol. 2018, no. 5, pp. 1-10, Sept. 2018 (doi: 10.1155/2018/5062960).

[23] N. Safoev, J.C. Jeon, "Design of high-performance QCA incrementer/decrementer circuit based on adder/s­ub­tractor methodology", Microprocessors and Microsystems, vol. 72, Article Number: 102927, Feb. 2020 (doi: 10.1016/j.micpro.2019.102927).

[24] M. Mosleh, "A novel design of multiplexer based on nano‐scale quantum‐dot cellular automata", Concurrency and Computation: Practice and Experience, vol. 31, no. 13, Article Number: e5070, July 2019 (doi: 10.10­02/cp­e.5070).

[25] M. Crocker, M. Niemier, X.S. Hu, M. Lieberman, "Molecular QCA design with chemically reasonable constraints", ACM Journal on Emerging Technologies in Computing Systems, vol. 4, no. 2, pp. 1–21, April 2008 (doi: 10.1145/1350763.1350769).

[26] S. Bhanja, M. Ottavi, F. Lombardi, S. Pontarelli, "Novel designs for thermally robust coplanar crossing in QCA",  Proceeding of the IEEE/DATE, vol. 1, pp. 1-6, Munich, Germany, March 2006 (doi: 10.1109/DAT­E.20­06.244120).

[27] A. Navidi, A. Sabbaghi-Nadooshan, M. Dousti, "Introducing an innovative D flip-flop for designing quate­rn­a­ry QCA register", Journal of Intelligent Procedures in Electrical Technology, vol. 13, no. 49, pp. 83- 92, June 2022 (in Persian) (dor: 20.1001.1.23223871.1401.13.49.6.5).

[28] F. Jahanshahi-Javaran, S. Jafarali-Jassbi, H. Khademolhosseini, R. Farazkish, "Computational circuit design using a new seven-input majority gate in quantum-dot cellular automata", Journal of Intelligent Procedures in Electrical Technology, vol. 15, no. 59, pp. 21-34, Dec. 2022 (in Persian) (doi: 20.1001.1.2322­3871.1­403.1­5.5­9.2.5).

[29] M.B. Khosroshahy, M.H. Moaiyeri, S. Angizi, N. Bagherzadeh, K. Navi, "Quantum-dot cellular automata circuits with reduced external fixed inputs", Microprocessors and Microsystems, vol. 50, pp. 154–163, May 2017 (doi: 10.1016/j.micpro.2017.03.009).

[30] D. Tripathi, S. Sana, S. Wairya, "Cell Optimization and Realization of MGDI and QCA based combinational logic circuits for nanotechnology applications", Proceeding of the IEEE/INDICON, pp. 1–8, New Delhi, India, Dec. 2020 (doi: 10.1109/INDICON49873.2020.9342097).

[31] N. K. Mandai, R. Chakrabarty, "Complementary dual-output universal gate in quantum dot cellular automata", Proceeding of the IEEE/IEMECON, pp. 321–323, Bangkok, Thailand, Aug. 2017 (doi: 10.1109/IEM­ECO­N.20­17.8­079615).

[32] M. Hayati, A. Rezaei, "Design of a new optimized universal logic gate for quantum-dot cellular automata", IETE Journal of Research, vol. 68, no. 2, pp. 1141-1147, 2022 (doi: 10.1080/03772063.2019.1643262).

[33] S.S. Ahmadpour, M. Mosleh, "A novel fault-tolerant multiplexer in quantum-dot cellular automata techno­lo­g­y", The Journal of Supercomputing, vol. 74, no. 9, pp. 4696–4716, Sept. 2018 (doi: 10.1007/s11227-018-2464-9).

[34] H. Rashidi, A. Rezai, S. Soltany, "High-performance multiplexer architecture for quantum-dot cellular auto­ma­ta", Journal of Computational Electronics, vol. 15, no. 3, pp. 968–981, Sept. 2016 (doi: 10.1007/s10825-016-0832-3).

[35] H. Rashidi, A. Rezai, S. Soltany, "A unique structure for the multiplexer in quantum-dot cellular automata to create a revolution in design of nanostructures", Journal of Computational Electronics, vol. 512, pp. 91–99, Sept. 2017 (doi: 10.1016/j.physb.2017.02.028).

[36] A. Firdous, "An optimal design of QCA based 2n:1/1:2n multiplexer/demultiplexer and its efficient digital logic realization", Microprocessors and Microsystems, vol. 56, pp. 64–75, Feb. 2018 (doi: 10.1016/j.micp­ro.­20­­17.10.010).

[37] L. Wang, G. Xie, "A novel XOR/XNOR structure for modular design of QCA circuits",  IEEE Trans. on Circuits and Systems, vol. 67, no. 12, pp. 3327–3331, April 2020 (doi: 10.1109/TCSII.2020.2989496).

[38] T.N. Sasamal, A.K. Singh, U. Ghanekar, "Design and analysis of ultra-low power QCA parity generator circuit", Advances in Power Systems and Energy Management, vol. 436, pp. 347–354, 2018 (doi: 10.1007/9­78-­9­81-10-4394-9_35).

[39] H. Mohammadi, K. Navi, "Energy-efficient single-layer QCA logical circuits based on a novel XOR gate",  Journal of Circuits, Systems and Computers, vol. 27, no. 14, Article Number: 1850216, Dec. 2018 (doi: 10.11­42/S­021812661850216X).

[40] Y. Zhang, F. Deng, X. Cheng, G. Xie, " A coplanar XOR using NAND-NOR-inverter and five-input majority voter in quantum-dot cellular automata technology", International Journal of Theoretical Physics, vol. 59, pp. 484-501, 2020 (doi: 10.1007/s10773-019-04343-w).