Computational Circuit Design Using a New Seven-Input Majority Gate in Quantum-dot Cellular Automata

Subject Areas : Renewable energy

Farzaneh Jahanshahi Javaran ¹ , Somayyeh Jafarali Jassbi ² , Hossein Khademolhosseini ³ , Razieh Farazkish ⁴

1 - Department of Computer Engineering- Science and Research Branch, Islamic Azad University, Tehran, Iran.
2 - Department of Computer Engineering- Science and Research Branch, Islamic Azad University, Tehran, Iran.
3 - Department of Computer Engineering- Beyza Branch, Islamic Azad University, Beyza, Iran
4 - Department of Computer Engineering- South Tehran Branch, Islamic Azad University, Tehran, Iran

Received: 2022-02-20 Accepted : 2022-07-16 Published : 2024-11-21

Keywords: Fault tolerance, Quantum-dot cellular Automata, Nano-electronics, seven-input Majority Gate, simulator software,

Abstract :

The quantum-dot cellular automata (QCA) technology is a computational technology used to build nano-scale circuits. When the dimensions of the components decrease, the sensitivity of the circuit increases and the quantum circuits become more vulnerable to the occurrence of defects and radiation in the environment. The two major gates in this technology are inverter and majority gates, and most circuits are built based on these two gates. This paper aimed to design a seven-input majority gate in quantum-dot cellular automata by imposing low overhead on the circuit. Using a majority gate with more inputs reduces cell count, latency, and complexity in the QCA circuit. However, perhaps the need to use the seven-input gate is not yet felt we then design and implement a number of logic circuits. A new 7-input majority gate is designed in this paper, with 19 cells. The proposed structure is single-layer with an occupied area of 24564 nm2 that produces the correct output in one clock phase, then a four-input AND gate, a four-input OR gate, a two-input XOR gate, a two-input XNOR, a three-input XOR gate and a full adder are implemented using the designed seven-input gate. Including all multi-bit full adders, using the proposed seven-input gate. The proposed full adder is designed by the seven-input majority gate proposed and a fault-tolerant three-input majority gate. Therefore, it can be said that the designed full adder is somewhat tolerable, that means, it is somewhat tolerable against the fault that occur in this technology. QCAPro software is used to analyze the energy consumption of the recommended structure. Then, the circuit performance is evaluated using QCADesigner 2.0.3 simulator software for quantum-dot cellular automata.  

References:

[1] R. Farazkish, S. Sayedsalehi, K. Navi, "Novel design for quantum dots cellular automata to obtain fault-tolerant majority gate", Journal of Nanotechnology, vol. 2012, Article Number: 943406, April 2012 )doi: 10.1­15­5/2­­012/943406.(

[2] H. Khademolhosseini S. Angizi, Y. Nemati, "A fault-tolerant design for 3-input majority gate in quantum-dot cellular automata", Journal of Nanoelectronics and Optoelectronics, vol. 13, no. 1, pp. 93-103, Jan. 2018 (doi: 10.1166/jno.2018.2175(.

[3] R. Farazkish, K. Navi, "New efficient five-input majority gate for quantum-dot cellular automata", Journal of Nanoparticle Research, vol. 14, no. 11, Article Number: 1252, Oct.  2012 (doi: 10.1007/s11051-012-125­2­-3).‏

[4] R. Farazkish, "A new quantum-dot cellular automata fault-tolerant five-input majority gate", Journal of Nanoparticle Research, vol. 16, no. 2, Article Number: 2259, Jan.  2014 (doi: 10.1007/s11051-014-2259-8).‏

[5] A. Roohi, H. Khademolhosseini, S. Sayedsalehi, K. Navi, "A symmetric quantum-dot cellular automata design for 5-input majority gate", Journal of Computational Electronics, vol. 13, no. 3, pp. 701-708, June 2014 (doi: 10.1007/s10825-014-0589-5).

[6] A.H.  Majeed, E. AlKaldy, M.S.B. Zainal, D.B. Nor, "A new 5-input majority gate without adjacent inputs crosstalk effect in QCA technology", Indonesian Journal of Electrical Engineering and Computer Science, vol. 14, no. 3, pp. 1159-1164, June 2019 (doi: 10.11591/ijeecs.v14.i3.pp1159-1164).

[7] S.S. Ahmadpour, M. Mosleh, S.R. Heikalabad, "The design and implementation of a robust single-layer QCA ALU using a novel fault-tolerant three-input majority gate", The Journal of Supercomputing, vol. 76, no. 12, pp. 10155-10185, March 2020 (doi: 10.1007/s11227-020-03249-3).‏

[8] S.S. Ahmadpour, M. Mosleh, S.R. Heikalabad, "An efficient fault-tolerant arithmetic logic unit using a novel fault-tolerant 5-input majority gate in quantum-dot cellular automata", Computers and Electrical Engineering, vol. 82, Article Number: 106548, March 2020. (doi: 10.1016/j.compeleceng.2020.106548 (.

[9] S. Seyedi, N. Jafari-Navimipour, "Designing a multi‐layer full‐adder using a new three‐input majority gate based on quantum computing", Concurrency and Computation: Practice and Experience, vol. 34, no. 4, Article Number: e6653, Feb. 2022. (doi: 10.1002/cpe.6653.(

[10] J. Bravo-Montes, A. Martín-Toledano, A. Sánchez-Macián, O. Ruano, F. Garcia-Herrero, "Design and implementation of efficient QCA full-adders using fault-tolerant majority gates", The Journal of Supercomputing, vol. 78, no. 6, pp. 8056-8080, Jan. 2022 (doi: 10.1007/s11227-021-04247-9).

[11] K. Navi, A.M. Chabi, S. Sayedsalehi, "A novel seven input majority gate in quantum-dot cellular automata", International Journal of Computer Science Issues, vol. 9, no. 1, pp. 84-89, Jan. 2012.

[12] H. Mohammadi, K. Navi, M. Hosseinzadeh, "An efficient quantum-dot cellular automata full adder based on a new convertible 7-input majority-not gate", IETE Journal of Research, pp. 1-9, Nov. 2020 (doi: 10.1080/03772063.2020.1838338)‏.

[13] J. Jeon, "7-input majority gate based priority encoder using multi-layer quantum-dot cellular automata", Advanced Science Letters, vol. 23, no. 10, pp. 10118-10122, Oct. 2017 ‏(doi: 10.1166/asl.2017.10400).

[14] A.O. Orlov, I. Amlani, G. Toth, C.S. Lent, G.H. Bernstein, G.L. Snider, "Experimental demonstration of a binary wire for quantum-dot cellular automata", Applied Physics Letters, vol. 74, no. 19, pp. 2875-2877, May 1999 (doi: 10.1063/1.124043).‏

[15] A.O. Orlov, I. Amlani, R.K. Kummamuru, R. Ramasubramaniam, G. Toth, C.S. Lent, G.L. Snider, "Experimental demonstration of clocked single-electron switching in quantum-dot cellular automata", Applied Physics Letters, vol. 77, no. 2, pp. 295-297, May 2000 (doi: 10.1063/1.126955).‏

[16] L. Lu, W. Liu, M. ONeill, E.E. Swartzlander, "QCA systolic array design", IEEE Trans. on Computers, vol. 62, no. 3, pp. 548-560, Dec. 2011 (doi: 10.1109/TC.2011.234).

[17] M. Askari, M. Taghizadeh, "Logic circuit design in nano-scale using quantum-dot cellular automata", European Journal of Scientific Research, vol. 48, no. 3, pp. 516-526, 2011.‏

[18] L.A. Lim, A. Ghazali, S.C.T. Yan, C.C. Fat, "Sequential circuit design using quantum-dot cellular Automata (QCA)", Proceeding of the IEEE/ICCAS, pp. 162-167, Kuala Lumpur, Malaysia, Oct. 2012 (doi: 10.1109­/IC­C­ircuitsAndSystems.2012.6408320).

[19] S. Jafarali-Jassbi, F. Jahanshahi-Javaran, H. Khademolhosseini, A. Sabbagh-Molahosseini, "Design and analysis of a fault tolerant 3-input majority gate in quantum-dot cellular automata", Journal of Advances in Computer Research, vol. 10, no. 4, pp. 27-36, Nov. 2019.