Very High Throughput Implementation of Advanced Encryption Standard (AES) Algorithm on FPGA

Rahmanpour, Mahdi; Amirabadi Zavare, Amir

Signal Processing and Renewable Energy

Issue 4 Vol. 1 Autumn 2017

Submit Your Paper
Review for this publication

PDF XML

Downloads : 38

Export Article
- BibTex
- EndNote
- RIS
- ISI
- APA
- MLA
- HARVARD
- VANCOUVER
- Mendeley
- HTML
Related Links
- Google Scholar
More by Authors Link
- DOAJ
  - Mahdi Rahmanpour
  - Amir Amirabadi Zavare
- Google Scholar
  - Mahdi Rahmanpour
  - Amir Amirabadi Zavare
- PubMed
  - Mahdi Rahmanpour
  - Amir Amirabadi Zavare

Share To

Article Url

Manuscript ID : JEES-1708-1008 Visit : 132 Page: 1 - 8

20.1001.1.25887327.2017.1.4.1.8

Article Type: Original Research

Very High Throughput Implementation of Advanced Encryption Standard (AES) Algorithm on FPGA

Subject Areas : Communication

Mahdi Rahmanpour ¹ , Amir Amirabadi Zavare ²

1 - Faculty of Electrical Engineering Islamic Azad University, South Tehran Branch Tehran, Iran
2 - Faculty of Electrical Engineering Islamic Azad University, South Tehran Branch Tehran, Iran

Received: 2017-08-11 Accepted : 2017-11-12 Published : 2017-12-01

Keywords:

Abstract :

References:

Share To

Article Url

Very High Throughput Implementation of Advanced Encryption Standard (AES) Algorithm on FPGA

Sanad

Links

Related Centers

Technical Support

Official pages