فهرس المقالات frequency synthesizer

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  1 - A Practical Method for Measurement of FM bandwidth Modulation of Voltage-Controlled Oscillators
  Hossein Mohseni
  FM bandwidth Modulation is an important parameter in voltage-controlled oscillators. The importance of this parameter is especially evident in cases in which the loop bandwidth of phase locked loops is comparable with the FM bandwidth of the oscillator. In this paper, a أکثر

  FM bandwidth Modulation is an important parameter in voltage-controlled oscillators. The importance of this parameter is especially evident in cases in which the loop bandwidth of phase locked loops is comparable with the FM bandwidth of the oscillator. In this paper, a practical method for measuring the FM bandwidth of a voltage-controlled oscillator is presented. تفاصيل المقالة
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  2 - Simulation, Modeling and Implementation of an Ultra-Low Phase Noise X-band Frequency Synthesizer
  Hossein Mohseni
  One of the most important components in telecommunication systems and radar activities are frequency synthesizers. Among the important parameters of a frequency synthesizer are phase noise, frequency resolution, programming speed, scanning rate and spur level in the out أکثر

  One of the most important components in telecommunication systems and radar activities are frequency synthesizers. Among the important parameters of a frequency synthesizer are phase noise, frequency resolution, programming speed, scanning rate and spur level in the output spectrum of the system. Typically, it is not possible for a frequency synthesizer to reach all of these parameters simultaneously. In other words, there are trade-offs between desired parameters. Among the structures of frequency synthesizers that can be used to achieve the optimal point for these parameters are multi-loop phase lock loop. In this paper, by presenting the noise model of different elements of a frequency synthesizer, simulations related to the achievable phase noise for a sample synthesizer in the X band are presented and finally the results of implementation of a sample synthesizer are presented. تفاصيل المقالة
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  3 - Δ∑ Fractional-N Synthesizer for GSM-E-900 Frequency Standard
  Alireza Bagherzadeh Mostafa Yargholi
  This paper presents an integrated phase-locked loop (PLL) frequency synthesizer for wireless communication application in standard 0.18 µm CMOS process. Delta sigma modulator used for reducing phase noise. The use of  modulation concepts results in a beneficial noise sh أکثر

  This paper presents an integrated phase-locked loop (PLL) frequency synthesizer for wireless communication application in standard 0.18 µm CMOS process. Delta sigma modulator used for reducing phase noise. The use of  modulation concepts results in a beneficial noise shaping of the phase noise (jitter) introduced by fractional-N division. The this technique has the potential to provide low phase noise, fast settling time, and reduced impact of spurious frequencies when compared with existing fractionalPLL techniques. Simulation results show that the phase noise of frequency synthesizer is -108 @1MHz offset, and the PLL synthesizer provides output frequencies 880-915 MHz in uplink and 925-960 MHz in downlink. Fref is 26 MHz and channel spicing is 700 KHz. Moreover, benefiting from the combination of current-mode-logic (CML) the PLL consumes a total power dissipation of only 24.35 mW with a single 1.8 V supply including all the buffers. Although prescaler increases settling time (ts), it decreases power consumptions. Settling time in uplink is 425 ns and in downlink about 475 ns. تفاصيل المقالة
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  4 - Single spiking neuron as direct digital frequency synthesizer
  Pooya Soleimani Abhari Farhad Razaghian Saeed Talebi Toti
  According to the neuroscience, studies on third generation of neural networks called spik- ing neural networks (SNN) have been developed recently. SNNs are used to model natural comput- ing of the brain. Spike train based networks are investigated as signal processing o أکثر

  According to the neuroscience, studies on third generation of neural networks called spik- ing neural networks (SNN) have been developed recently. SNNs are used to model natural comput- ing of the brain. Spike train based networks are investigated as signal processing of the brain is an objective. This paper propose a digital hardware implementation of a single spiking neuron. The neuron is used as a direct digital frequency synthesizer. The proposed architecture uses leaky integrate and fire (LIF) neuronal model which is easy to implement. Inter spike interval (ISI) of the input and the output spikes are used as coding scheme. A FPGA platform is utilized due to its flexibility and real time applications. The simulation results of both Matlab and Quartus II indicate acceptable accuracy of the proposed design compared to the related works. The Verilog language is used for hardware simulation. The maximum operating frequency of 250 MHz is reached on Cyclone III device. تفاصيل المقالة