TY  - JOUR
AU  - Navi, Keivan
AU  - Ghoreishi, Neda
AU  - Sabbaghi-Nadooshan, Reza
AU  - Esmaeildoust, Mohammad
TI  - Design of Multiple-Valued Interconnection Networks with Gate all Around Transistor for Smart Computer Networks
JO  - International Journal of Smart Electrical Engineering
VL  - 12
IS  - 1
SP  - 11
EP  - 21
PY  - 2023
DO  - 10.30495/ijsee.2022.1957791.1198
ER  -