طراحی و شبیه سازی مبدل سیگما دلتای فوق کم مصرف با استفاده از تقویت کننده تمام تفاضلی مبتنی بر اینورتر برای کاربرد سمعک دیجیتال
الموضوعات :
شیما علیزاده زنجانی
1
,
ابومسلم جان نثاری
2
,
پویا ترکزاده
3
1 - دانشکده مهندسی مکانیک، برق و کامپیوتر- واحد علوم و تحقیقات، دانشگاه آزاد اسلامی، تهران، ایران
2 - دانشکده برق و کامپیوتر- دانشگاه تربیت مدرس ، تهران، ایران
3 - دانشکده مهندسی مکانیک، برق و کامپیوتر- واحد علوم و تحقیقات، دانشگاه آزاد اسلامی، تهران، ایران
الکلمات المفتاحية: تقویت کننده مبتنی بر اینورتر, سمعک دیجیتال, سیگما دلتای زمان گسسته, مبدل سیگما دلتا, فوق‌کم مصرف, مدولاتور,
ملخص المقالة :
در این مقاله، یک مبدل سیگما دلتای زمان گسسته فوق کم‌مصرف مرتبه دوم، برای کاربرد سمعک پیشنهاد شده است. در تجهیزات پزشکی مانند سمعک که دایما استفاده می‌شود، طول عمر باتری و مصرف انرژی مورد توجه است. در مبدل های سیگما-دلتا نوعی، OTA ها بیشترین مصرف را دارند. حذف OTAها در مبدلهای سیگما دلتا همچنان یک چالش محسوب می‌شود. بنابراین مبدلی با یک تقویت کننده مبتنی بر اینورتر دیفرانسیلی کامل خود بایاس با اتلاف توان استاتیک 1.15 µW با ولتاژ تغذیه 1 ولت طراحی شده است. این تقویت کننده مبتنی بر اینورتر، به جای OTA در هر دو طبقه مدولاتور استفاده شده است. ساختار این مبدل، CIFB ، تک حلقه و تک بیتی است. مدولاتور دیفرانسیل پیشنهادی با استفاده از فناوری استاندارد 180 نانومتر CMOS طراحی و شبیه سازی شده، و مقدار SFDR و SNDR آن به ترتیب برابر با 95.2878dB و 64.004 dB بدست آمده است. فرکانس نمونه برداری 2.56 MHz در نظر گرفته شده و پهنای باند سیگنال ورودی برابر با 10 kHz است. این مدولاتور، تنها 5.1091 µW انرژی مصرف می کند و FOMW آن برابر با 0.197 pj/step است.
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[14] C. Chen, H. Zhang, "A 0.6-V, 69-dB subthreshold sigma-delta modulator", Journal of Semiconductors, vol. 39, Article Number: 125004, Dec. 2018 (doi:10.1088/1674-4926/39/12/125004).
[15] V.M.D. Cruz, A. Silverio, "A 63 µW 92.68-dB SNDR sigma-delta modulator using self-biased inverter-based amplifiers", Proceeding of the IEEE/ISEE, pp. 5-8, Ho Chi Minh, Vietnam, April 2021 (doi: 10.1109/ISEE51682.2021.9418716).
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[21] N. Chamanpira, S.M.A. Zanjani, M. Dolatshahi, "Design and simulation of a new sample and hold circuit with resolution of 12-Bit and a sampling rate of 1 GS/s using a dual sampling technique", Journal of Intelligent Procedures in Electrical Technology, vol.9, no. 34, pp. 3-10, Sept. 2018 (dor: 20.1001.1.23223871.1397.9.34.1.2) (in Persian).
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[27] S. Porrazzo, F. Cannillo, C. Van Hoof, E. Cantatore, A. H. van Roermund, "A power-optimal design methodology for high-resolution low-bandwidth SC Delta-Sigma modulators", IEEE Trans. on Instrumentation and Measurement, vol. 61, pp. 2896-2904, June. 2012 (doi: 10.1109/TIM.2012.2200812).
[28] J. Goes, B. Vaz, R. Monteiro, N. Paulino, "A 0.9 V delta-sigma modulator with 80dB SNDR and 83dB DR using a single-phase technique", Proceeding of the IEEE/ISSCC, pp. 191-200, San Francisco, CA, USA, Feb. 2006 (doi: 10.1109/ISSCC.2006.1696048).
[29] J. Sauerbrey, T. Tille, D. Schmitt-Landsiedel, R. Thewes, "A 0.7-V MOSFET-only switched-opamp /spl Sigma//spl Delta/ modulator in standard digital CMOS technology", IEEE Journal of Solid-State Circuits, vol. 37, no. 12, pp. 1662-1669, Dec. 2002 (doi: 10.1109/JSSC.2002.804330).
_||_[1] World Health Organization, Deafness and hearing loss. [Online] Available: https://www.who.int/news-room/fact-sheets/detail/deafness-and-hearing-loss, April 2021.
[2] H. Helgi, "A 0.9-V 37-uW 98-dB DR inverter-based ΔΣ modulator for hearing aids", Master Thesis, Department of Electrical and Information Technology, Faculty of Engineering, LTH, Lund University, Lund University, Sweden E-huset, Lund, 2014.
[3] F. Chen, B. Leung, "A 0.25-mW low-pass passive sigma-delta modulator with built-in mixer for a 10-MHz IF input", IEEE Journal of Solid-State Circuits, vol. 32, no. 6, pp. 774-782, June 1997 (doi: 10.1109/4.585244).
[4] J.R. Custódio, J. Goes, N. Paulino, J.P. Oliveira, E. Bruun, "A 1.2-V 165µW 0.29-mm 2 multibit sigma-delta ADC for hearing aids using nonlinear DACs and with over 91 dB dynamic-range", IEEE Trans. on Biomedical Circuits and Systems, vol. 7, no. 3, pp. 376-385, June 2013 (doi: 10.1109/TBCAS.2012.22 03819).
[5] H. Luo, Y. Han, R.C. Cheung, X. Liu, T. Cao, "A 0.8-V 230-µW 98-dB DR inverter-based sigma-delta modulator for audio applications", IEEE Journal of Solid-State Circuits, vol. 48, pp. 2430-2441, Oct. 2013 (doi: 10.1109/JSSC.2013.2275659)
[6] J.K. Fiorenza, T. Sepke, P. Holloway, C.G. Sodini, H.S. Lee, "Comparator-based switched-capacitor circuits for scaled CMOS technologies", IEEE Journal of Solid-State Circuits, vol. 41, pp. 2658-2668, Dec. 2006 (doi: 10.1109/JSSC.2006.884330).
[7] Y. Lin, M. Ismail, "Time-based all-digital sigma-delta modulators for nanometer low voltage CMOS data converters", Analog Integrated Circuits and Signal Processing, vol. 73, pp. 801-808, 2012 (doi: 10.1007/s10470-012-9901-0).
[8] A.F. Yeknami, "Low-power delta-sigma modulators for medical applications", Printed by LiU-Tryck, Linkoping University, Linkoping, Sweden, No. 1563, ISSN 0345-7524, 2011.
[9] R. Moradi, E. Farshidi, M. Soroosh, "A low power passive-active ΔΣ modulator with high-resolution employing an integrator with open-loop unity-gain buffer", Integration, vol. 64, pp. 137-142, Jan. 2019 (doi: 10.1016/j.vlsi.2018.09.006).
[10] S.M.A. Zanjani, M. Parvizi, "Design and simulation of a bulk driven operational trans-conductance amplifier based on CNTFET technology", Journal of Intelligent Procedures in Electrical Technology, vol. 12, no. 45, pp. 65-76, Spring 2021 (dor: 20.1001.1.23223871.1400.12.1.5.1) (in Persian).
[11] R. Moradi, E. Farshidi, "Sigma-delta analog to digital modulator and modulator error compensation", Plastics, 1th Edition, vol. 1, Niazedanesh Press, 2018 (in Persian).
[12] R. Schreier, G.C. Temes, "Understanding delta-sigma data converters", vol. 74: IEEE press Piscataway, NJ, 1st Edition, Sept. 2005.
[13] Y. Chae, G. Han, "Low voltage, low power, inverter-based switched-capacitor delta-sigma modulator", IEEE Journal of Solid-State Circuits, vol. 44, no. 2, pp. 458-472, Jan. 2009 (doi: 10.1109/JSSC.2008.2010973).
[14] C. Chen, H. Zhang, "A 0.6-V, 69-dB subthreshold sigma-delta modulator", Journal of Semiconductors, vol. 39, Article Number: 125004, Dec. 2018 (doi:10.1088/1674-4926/39/12/125004).
[15] V.M.D. Cruz, A. Silverio, "A 63 µW 92.68-dB SNDR sigma-delta modulator using self-biased inverter-based amplifiers", Proceeding of the IEEE/ISEE, pp. 5-8, Ho Chi Minh, Vietnam, April 2021 (doi: 10.1109/ISEE51682.2021.9418716).
[16] D.A. Johns, K. Martin, "Analog integrated circuit design", John Wiley & Sons press, 2nd Edition, Dec, 2011.
[17] J. Basu, P. Mandal, "Switched-capacitor common-mode feedback-based fully differential operational amplifiers and its usage in implementation of integrators", Journal of Circuits, Systems and Computers, vol. 29, Article Number: 2050223, March 2020 (doi: 10.1142/S0218126620502230).
[18] M.A. Jeshvaghani, M. Dolatshahi, "Design of a low-power universal Gm-C filter in sub-threshold region", Journal of Intelligent Procedures in Electrical Technology, vol. 4, no. 15, pp. 3-10, June 2013 (dor: 20.1001.1.23223871.1392.4.15.1.9) (in Persian).
[19] M. Shahriary, A. Ghasemi, N.C. Shirazi, "Improvement of SNDR using optimization of feedback Path coefficients for second order CRFB modulators in sigma-delta analog to digital converters", Journal of Communication Engineering, vol. 11, no. 41, pp. 15-28, Summer 2021 (in Persian).
[20] N.C. Shirazi, A. Jannesari, P. Torkzadeh, "Self-start-up fully integrated dc-dc step-up converter using body biasing technique for energy harvesting applications", AEU-International Journal of Electronics and Communications, vol. 95, pp. 24-35, Oct. 2018 (doi: 10.1016/j.aeue.2018.07.033).
[21] N. Chamanpira, S.M.A. Zanjani, M. Dolatshahi, "Design and simulation of a new sample and hold circuit with resolution of 12-Bit and a sampling rate of 1 GS/s using a dual sampling technique", Journal of Intelligent Procedures in Electrical Technology, vol.9, no. 34, pp. 3-10, Sept. 2018 (dor: 20.1001.1.23223871.1397.9.34.1.2) (in Persian).
[22] S. Porrazzo, A. Morgado, D.S. S. Bello, F. Cannillo, C. Van Hoof, R.F. Yazicioglu, A.H.M. Roermund, E. Cantatore, "A 155 µW 88-dB DR discrete-time delta-sigma modulator for digital hearing aids exploiting a summing SAR ADC quantizer", IEEE Trans. on biomedical circuits and systems, vol. 7, no. 5, pp. 573-582, Oct. 2013 (doi: 10.1109/BioCAS.2012.6418450).
[23] L.M. Chen, Z.H. Yu, C.Y. Chen, X.Y. Hu, J. Fan, J. Yang, Y. Hei, "A 1-V, 1.2-mA fully integrated SoC for digital hearing aids", Microelectronics Journal, vol. 46, no. 1, pp. 12-19, Jan. 2015 (doi: 10.1016/j.mejo.2014.09.013).
[24] J.E. Park, Y.H. Hwang, D.K. Jeong, "A 0.4-to-1 V voltage scalable delta-sigma ADC with two-step hybrid integrator for IoT sensor applications in 65-nm LP CMOS", IEEE Trans. on Circuits and Systems II: Express Briefs, vol. 64, no. 12, pp. 1417-1421, Dec. 2017 (doi: 10.1109/TCSII.2017.2753841).
[25] V. Sharma, Y.B.N. Kumar, M.H. Vasantha. "36 μW fourth order sigma-delta modulator using single operational amplifier", International Journal of Electronics Letters, vol. 9, no. 2, pp. 171-186, Jan. 2021 (doi: 10.1080/21681724.2020.1717003).
[26] A. Nilchi, D.A. Johns, "A low-power delta-sigma modulator using a charge-pump integrator", IEEE Trans. on Circuits and Systems, vol. 60, pp. 1310-1321, Dec. 2012 (doi: 10.1109/TCSI.2012.2220462).
[27] S. Porrazzo, F. Cannillo, C. Van Hoof, E. Cantatore, A. H. van Roermund, "A power-optimal design methodology for high-resolution low-bandwidth SC Delta-Sigma modulators", IEEE Trans. on Instrumentation and Measurement, vol. 61, pp. 2896-2904, June. 2012 (doi: 10.1109/TIM.2012.2200812).
[28] J. Goes, B. Vaz, R. Monteiro, N. Paulino, "A 0.9 V delta-sigma modulator with 80dB SNDR and 83dB DR using a single-phase technique", Proceeding of the IEEE/ISSCC, pp. 191-200, San Francisco, CA, USA, Feb. 2006 (doi: 10.1109/ISSCC.2006.1696048).
[29] J. Sauerbrey, T. Tille, D. Schmitt-Landsiedel, R. Thewes, "A 0.7-V MOSFET-only switched-opamp /spl Sigma//spl Delta/ modulator in standard digital CMOS technology", IEEE Journal of Solid-State Circuits, vol. 37, no. 12, pp. 1662-1669, Dec. 2002 (doi: 10.1109/JSSC.2002.804330).
