Hybrid Frequency Compensation to Improve Unity-Gain Bandwidth of Low-Voltage Low-Power CMOS Operational Amplifiers
الموضوعات : Majlesi Journal of Telecommunication Devices
Ghazal Moradi
1
(Islamic Azad University)
Mohammad Reza Alamdar
2
(Islamic Azad University)
Saber Izadpanah Tous
3
(Sadjad University of Technology)
الکلمات المفتاحية: op amp, indirect compensation, low-voltage low-power, en, hybrid frequency compensation, unbalanced differential pair,
ملخص المقالة :
In this paper a new hybrid frequency compensation (HFC) technique consists of indirect compensation and compensation using unbalanced differential pairs for low-voltage low-power CMOS operational amplifiers (op amp) is proposed. This technique significantly improves frequency response of the op amp and avoids instability when a large capacitive load at the output of the op amp must be handled. Also, Dynamic threshold voltage MOSFET (DTMOS) and sub-threshold region are utilized in the design to effectively use the low supply voltage and reduce power consumption. To evaluate the proposed technique, the two stage operational amplifier is designed and simulated in a TSMC 0.18 μm CMOS process technology. The op amp operate at 0.6 V power supply with 138.3 nW power consumption. The proposed HFC technique uses a total compensation capacitance of 3.5 pF and is robust in stability under the variation of the load capacitance between 0 pF and 100 pF. When driving a 15 pF load, the proposed HFC amplifier reduces the total capacitor size 35% and improves the unity-gain bandwidth 481% compared to the conventional Miller compensation.
[1] M. Yavari, O. Shoaei and F. Svelto, “Hybrid Cascode compensation for two-stage CMOS operational amplifiers,” IEEE International Symposium on Circuits and Systems, pp. 1565-1568, 2005.
[2] S. Izadpanah Tous, M. Behroozi, H. Nabovati and V. Asadpour, “Overview of Low-Voltage Low-Power Design Techniques and Design Low-Voltage Low-Power Low-Noise Operational Amplifier,” Majlesi Journal of Telecommunication Devices, Vol. 2, No. 2, pp. 198-204, 2013.
[3] A. Esmaili, H. Babazadeh, Kh. Hadidi and A. Khoei, “Bulk Driven Indirect Feedback Compensation Technique for Low-Voltage Applications,” 21st Iranian Conference on Electrical Engineering, pp. 1-5, 2013.
[4] V. Saxena and R. Baker, “Indirect feedback compensation of CMOS op-amps,” IEEE Workshop on Microelectronics and Electron Devices, pp. 3-4, 2006.
[5] V. Saxena and R. Baker, “Indirect compensation techniques for three-stage CMOS op-amps”, 52nd IEEE International Midwest Symposium on Circuits and Systems, pp. 9-12, 2009.
[6] V. Saxena and R. Baker, “Indirect compensation techniques for three-stage fully-differential op-amps”, 53rd IEEE International Midwest Symposium on Circuits and Systems, pp. 588-591, 2010.
[7] V. Saxena and R. Baker, “Indirect Compensation Technique for Low-Voltage Op-Amps”, in Proceedings of the 3rd Annual Austin Conference on Integrated Systems and Circuits, pp. 1-4, 2008.
[8] K. Ahuja, “An improved frequency compensation technique for CMOS operational amplifiers”, in IEEE Journal of Solid-State Circuits, Vol. SC-18, No. 6, pp.629-633, 1983.
[9] G. Palmisano and G. Palumbo, “A Compensation Strategy for Two-Stage CMOS OPAMS Based on Current Buffer,” IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, Vol. 44, No. 3, pp. 252–262, 1997.
[10] F. Assaderaghi, D. Sinitsky, S. Parke, J. Bokor, P. K. Ko, and C. Hu, “A dynamic threshold voltage MOSFET (DTMOS) for ultra-low voltage operation,” International Electron Devices Meeting, Technical Digest, pp. 809–812, 1994.
[11] F. Assaderaghi, D. Sinitsky, S. Parke, J. Bokor, P.K. Ko, Hu. Chenming, “Dynamic Threshold-Voltage MOSFET (DTMOS) for Ultra-Low Voltage VLSI,” IEEE Transaction on Electron Device, Vol. 44, No. 3, pp. 414-422, 1997.
[12] F. Assaderaghi, “DTMOS: Its derivatives and variations, and their potential applications,” International Conference on Microelectronic, pp. 9–10, 2000.
[13] E. Kargaran, M. Sawan, Kh. Mafinezhad, H. Nabovati, “Design of 0.4V, 386nW OTA Using DTMOS Technique for Biomedical Applications,” 55th IEEE International Midwest Symposium on Circuits and Systems, pp. 270–273, 2012.
[14] A. P. Ryan, O. McCarthy, "A novel pole-zero compensation scheme using unbalanced differential pairs", IEEE transactions on circuits and systems-I: Regular papers, Vol. 51, No. 2, pp. 1-10, 2004.
[15] L. H. C. Ferreira, T. C. Pimenta and R. L. Moreno, "An ultra-low-voltage ultra-low-power CMOS miller OTA with rail-to-rail input/output swing", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 54, No. 10, pp. 843-847, 2007.
[16] L. H. C. Ferreira, S. R. Sonkusale, "60-dB Gain OTA Operating at 0.25-V Power Supply in 130-nm Digital CMOS Process", IEEE transactions on circuits and systems-I: Regular papers, Vol. 61, No. 6, pp. 1609-1617, 2014.
[17] M. Akbari, O. Hashemipour, “Enhancing transconductance of ultra-lowpower two-stage folded cascode OTA,” Electronics Letters, Vol. 50, No. 21, pp. 1514-1516, 2014.
