طراحی و شبیه سازی مدولاتور سیگما دلتای مرتبه چهارم با استفاده از تقویت کننده پارامتریک با آستانه دینامیکی برای کاربرد سمعک دیجیتال
الموضوعات :
شیما علی زاده زنجانی
1
,
ابومسلم جان نثاری
2
,
پویا ترکزاده
3
1 - دانشکده مهندسی برق و کامپیوتر- واحد علوم و تحقیقات، دانشگاه آزاد اسلامی، تهران، ایران
2 - دانشکده مهندسی برق و کامپیوتر- دانشگاه تریت مدرس، تهران، ایران
3 - دانشکده مهندسی برق و کامپیوتر- واحد علوم و تحقیقات، دانشگاه آزاد اسلامی، تهران، ایران
الکلمات المفتاحية: مدولاتور دلتا سیگما, مدولاتور زمان گسسته, سمعک, تقویت کننده پارامتریک, تقویت کننده مبتنی بر اینورتر,
ملخص المقالة :
در این مقاله، یک مدولاتور مرتبه چهارم، بدون OTA ، تک بیتی و کم مصرف زمان گسسته (DT ) دلتا سیگما (ΔΣ) با ساختار CIFF برای کاربردهای سمعک پیشنهاد شده است. در دستگاه های پزشکی قابل حمل مانند سمعک که به طور دائم استفاده می شود، طول عمر باتری و اتلاف انرژی بسیار مهم است. در یک مدولاتور دلتا سیگما، پر مصرف‌ترین بخش OTAها هستند. بنابراین، حذف OTA ها یک چالش است، و مدولاتور پیشنهادی از تقویت‌کننده‌های پارامتریک تفاضلی، با استفاده از آستانه دینامیکی در طبقات زوج و تقویت کننده‌های مبتنی بر اینورتر در طبقات فرد دلتا سیگما به جای OTAها استفاده می‌کند. تکنیک PMOS آستانه دینامیکی برای اولین بار در MPA تفاضلی استفاده شده است و آنالیزهای تئوری و شبیه‌سازی‌های انجام شده، عملکرد بهتری را نسبت به روش سنتی نشان می‌دهد. همچنین، یک مدار چاپر در طبقه اول مدولاتور برای کاهش هارمونیک و نویز فلیکر استفاده شده است. مدولاتور تفاضلی پیشنهادی با استفاده از فناوری استاندارد CMOS 180 نانومتری شبیه‌سازی شده و 90.5 دسی‌بل SFDR، 64 دسی‌بل SNDR با فرکانس پهنای باند ورودی 10 کیلوهرتز و نسبت بیش نمونه برداری 128 به دست آمد. ولتاژ تغذیه 1 ولت و FOMW برابر با 3.43 PJ/step است.
[1] H. Helgi, "A 0.9-V 37-µW 98-dB DR Inverter-Based ΔΣ Modulator for Hearing Aids," Master Thesis, Department of Electrical and Information Technology, Faculty of Engineering, LTH, Lund University, Lund University, Sweden E-huset, Lund, 2014.
[2] L. Pisha, J. Warchall, T. Zubatiy, S. Hamilton, C. H. Lee, G. Chockalingam, et al., "A Wearable, Extensible, Open-Source Platform for Hearing Healthcare Research," IEEE Access, vol. 7, pp. 162083-162101, 2019, doi:10.1109/ACCESS.2019.2951145.
[3] D. Kanemoto, T. Ido, and K. Taniguchi, "A 7.5 mW 101dB SNR low-power high-performance audio delta-sigma modulator utilizing opamp sharing technique," in International SoC Design Conference, 2011, pp. 66-69. doi: 10.1109/JSSC.2008.920329.
[4] M. G. Kim, G.-C. Ahn, P. K. Hanumolu, S.-H. Lee, S.-H. Kim, S.-B. You, et al., "A 0.9 V 92 dB double-sampled switched-RC delta-sigma audio ADC," IEEE Journal of Solid-State Circuits, vol. 43, no. 5, pp. 1195-1206, 2008. doi: 10.1109/JSSC.2008.920329.
[5] J. Sauerbrey, T. Tille, D. Schmitt-Landsiedel, and R. Thewes, "A 0.7-V MOSFET-only switched-opamp Sigma Delta modulator in standard digital CMOS technology," IEEE Journal of solid-state circuits, vol. 37, no. 12, pp. 1662-1669, 2002. doi: 10.1109/JSSC.2002.804330.
[6] F. Chen and B. Leung, "A 0.25-mW low-pass passive sigma-delta modulator with built-in mixer for a 10-MHz IF input," IEEE Journal of Solid-State Circuits, vol. 32, no. 6, pp. 774-782, 1997. doi: 10.1109/4.585244.
[7] H. Luo, Y. Han, R. C. Cheung, X. Liu, and T. Cao, "A 0.8-V 230-µW 98-dB DR Inverter-Based Sigma Delta Modulator for Audio Applications," IEEE Journal of Solid-State Circuits, vol. 48, no. 10, pp. 2430-2441, 2013. doi: 10.1109/JSSC.2013.2275659.
[8] Y. Lin and M. Ismail, "Time-based all-digital sigma–delta modulators for nanometer low voltage CMOS data converters," Analog Integrated Circuits and Signal Processing, vol. 73, pp. 801-808, 2012. doi: 10.1007/s10470-012-9901-0.
[9] J. K. Fiorenza, T. Sepke, P. Holloway, C. G. Sodini, and H.-S. Lee, "Comparator-based switched-capacitor circuits for scaled CMOS technologies," IEEE Journal of Solid-State Circuits, vol. 41, no. 12, pp. 2658-2668, 2006. doi: 10.1109/JSSC.2006.884330.
[10] S. Ranganathan and Y. Tsividis, "Discrete-time parametric amplification based on a three-terminal MOS varactor: Analysis and experimental results," IEEE Journal of Solid-State Circuits, vol. 38, no. 12, pp. 2087-2093, 2003. doi: 10.1109/JSSC.2003.819162.
[11] P. M. Figueiredo and J. C. Vital, "The MOS capacitor amplifier," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 51, no. 3, pp. 111-115, 2004. doi: 10.1109/TCSII.2003.822427.
[12] A. Yoshizawa and S. Iida, "A gain-boosted discrete-time charge-domain FIR LPF with double-complementary MOS parametric amplifiers," in 2008 IEEE International Solid-State Circuits Conference-Digest of Technical Papers, 2008, pp. 68-596. doi: 10.1109/ISSCC.2008.4523060.
[13] J. P. Oliveira and J. Goes, "Parametric analog signal amplification applied to nanoscale CMOS technologie," Springer Science & Business Media, 2012.
[14] A. J. S. Alizadeh Zanjani, P. Torkzadeh, "Design and simulation of ultra-low-power sigma-delta converter using the fully differential inverter-based amplifier for digital hearing aids application," Journal of Intelligent Procedures in Electrical Technology, vol. 13, pp. 75-90, 2022.
[15] A. P. R. S. Sonam, "Dynamic Threshold MOS (DTMOS) And its Application," International Journal of Science, Engineering and Technology Research (IJSETR), vol. 5, 2016.
[16] N. C. Shirazi, A. Jannesari, and P. Torkzadeh, "Self-start-up fully integrated DC-DC step-up converter using body biasing technique for energy harvesting applications," AEU-International Journal of Electronics and Communications, vol. 95, pp. 24-35, 2018. doi: 10.1016/j.aeue.2018.07.033.
[17] J. R. Custódio, M. Figueiredo, E. Santin, and J. Goes, "A CMOS Inverter-Based Self-biased Fully Differential Amplifier," in Emerging Trends in Technological Innovation: First IFIP WG 5.5/SOCOLNET Doctoral Conference on Computing, Electrical and Industrial Systems, DoCEIS 2010, Costa de Caparica, Portugal, February 22-24, 2010. Proceedings 1, 2010, pp. 541-548. doi: 10.1007/978-3-642-11628-5_60.
[18] J. S. Cho, C. Rhee, S. Kim, Y. Yang, J. Jun, S. Kim, et al., "A 1.2-V 108.9-dB A-Weighted DR 101.4-dB SNDR Audio $\Sigma\Delta $ ADC Using a Multi-Rate Noise-Shaping Quantizer," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 10, pp. 1315-1319, 2018. doi: 10.1109/TCSII.2018.2853189.
[19] P. Li, W. Xi, X. Zeng, X. Li, and D. Zheng, "A Small-Area, Low-Power Delta-Sigma DAC Applied to a Power-Specific Chip," Journal of Sensors, vol. 2021, p. 6630100, 2021/05/25 2021. doi: 10.1155/2021/6630100.
[20] X. Honglin, F. Qiang, L. Hongna, Y. Liang, W. Pengfei, and L. Xiaowei, "A 16-bit sigma–delta modulator applied in micro-machined inertial sensors," Journal of Semiconductors, vol. 35, no. 4, p. 045007, 2014. doi: 10.1088/1674-4926/35/4/045007.
[21] R. Schreier and G. C. Temes, Understanding delta-sigma data converters vol. 74: IEEE press Piscataway, NJ, 2005.
[22] R. Wei, W. Wang, X. Xiao, and Q. Chen, "A low-power delta-sigma Capacitance-to-Digital converter for capacitive sensors," IEEE Access, vol. 7, pp. 78281-78288, 2019. doi: 10.1109/ACCESS.2019.2922840.
[23] X.-P. Di, W.-P. Chen, L. Yin, and X.-W. Liu, "A 99.7-dB DR fourth-order sigma–delta modulator for digital gyroscope sensor," Modern Physics Letters B, vol. 31, no. 09, p. 1750097, 2017. doi:10.1142/S021798491750097X.
[24] A. F. Yeknami, "Low-Power Delta-Sigma Modulators for Medical Applications," 2014.
[25] F. Michel and M. S. Steyaert, "A 250 mV 7.5 μW 61 dB SNDR SC ΔΣ modulator using near-threshold-voltage-biased inverter amplifiers in 130 nm CMOS," IEEE Journal of solid-state circuits, vol. 47, no. 3, pp. 709-721, 2012. doi: 10.1109/JSSC.2011.2179732.
[26] J.-E. Park, Y.-H. Hwang, and D.-K. Jeong, "A 0.4-to-1 V Voltage Scalable Delta Sigma ADC With Two-Step Hybrid Integrator for IoT Sensor Applications in 65-nm LP CMOS," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 64, no. 12, pp. 1417-1421, 2017. doi: 10.1109/TCSII.2017.2753841.
[27] V. Sharma, N. Kumar YB, and V. MH, "36 μW fourth order sigma-delta modulator using single operational amplifier," International Journal of Electronics Letters, vol. 9, no. 2, pp. 1-16, 2020. doi: 10.1080/21681724.2020.1717003.
[28] L.-M. Chen, Z.-H. Yu, C.-Y. Chen, X.-Y. Hu, J. Fan, J. Yang, et al., "A 1-V, 1.2-mA fully integrated SoC for digital hearing aids," Microelectronics Journal, vol. 46, no. 1, pp. 12-19, 2015. doi:10.1016/j.mejo.2014.09.013.
[29] S. Porrazzo, A. Morgado, D. S. S. Bello, F. Cannillo, C. Van Hoof, R. F. Yazicioglu, et al., "A 155 µW 88-dB DR Discrete-Time Delta Sigma Modulator for Digital Hearing Aids Exploiting a Summing SAR ADC Quantizer," IEEE transactions on biomedical circuits and systems, vol. 7, no. 5, pp. 573-582, 2013. doi: 10.1109/TBCAS.2013.2280694.
[30] J. R. Custódio, J. Goes, N. Paulino, J. P. Oliveira, and E. Bruun, "A 1.2-V 165-μW 0.29-mm² Multibit Sigma-Delta ADC for Hearing Aids Using Nonlinear DACs and With Over 91 dB Dynamic-Range," IEEE Transactions on Biomedical Circuits and Systems, vol. 7, no. 3, pp. 376-385, 2013. doi:10.1109/TBCAS.2012.2203819.
[31] Wang B, Sin SW, Seng-Pan U, Maloberti F, Martins RP. "A 550µW 20-kHz BW 100.8-dB SNDR Linear-Exponential Multi-Bit Incremental Sigma Delta ADC With 256 Clock Cycles in 65-nm CMOS", IEEE Journal of Solid-State Circuits, 2019 Jan 8; vol. 54, no. 4, pp. 1161-1172, doi: 10.1109/JSSC.2018.2888872.
[32] H. Jeon, J. -S. Bang, Y. Jung, I. Choi and M. Je, "A High DR, DC-Coupled, Time-Based Neural-Recording IC With Degeneration R-DAC for Bidirectional Neural Interface," in IEEE Journal of Solid-State Circuits, vol. 54, no. 10, pp. 2658-2670, Oct. 2019, doi: 10.1109/JSSC.2019.2930903.
[33] S. Rout and W. Serdijn, “High-pass Δ converter design using a state space approach and its application to cardiac signal acquisition,” IEEE Trans. Biomed. Circuits Syst., vol. 12, no. 3, pp. 483–494, Jun. 2018. doi: 10.1109/TBCAS.2018.2817926.
[34] S. -Y. Lee, P. -H. Su, K. -L. Huang, Y. -W. Hung and J. -Y. Chen, "High-Pass Sigma–Delta Modulator With Techniques of Operational Amplifier Sharing and Programmable Feedforward Coefficients for ECG Signal Acquisition," in IEEE Transactions on Biomedical Circuits and Systems, vol. 15, no. 3, pp. 443-453, June 2021, doi: 10.1109/TBCAS.2021.3082545.
[35] M. Shahriary,A. Ghasemi and N. C. Shirazi, "Improvement of SNDR using Optimization of Feedback Path Coefficients for Second Order CRFB Modulators in Sigma-Delta Analog to Digital Converters," Journal of Southern Communication Engineering, vol. 11, no. 41, pp. 15-28, 2021.
_||_[1] H. Helgi, "A 0.9-V 37-µW 98-dB DR Inverter-Based ΔΣ Modulator for Hearing Aids," Master Thesis, Department of Electrical and Information Technology, Faculty of Engineering, LTH, Lund University, Lund University, Sweden E-huset, Lund, 2014.
[2] L. Pisha, J. Warchall, T. Zubatiy, S. Hamilton, C. H. Lee, G. Chockalingam, et al., "A Wearable, Extensible, Open-Source Platform for Hearing Healthcare Research," IEEE Access, vol. 7, pp. 162083-162101, 2019, doi:10.1109/ACCESS.2019.2951145.
[3] D. Kanemoto, T. Ido, and K. Taniguchi, "A 7.5 mW 101dB SNR low-power high-performance audio delta-sigma modulator utilizing opamp sharing technique," in International SoC Design Conference, 2011, pp. 66-69. doi: 10.1109/JSSC.2008.920329.
[4] M. G. Kim, G.-C. Ahn, P. K. Hanumolu, S.-H. Lee, S.-H. Kim, S.-B. You, et al., "A 0.9 V 92 dB double-sampled switched-RC delta-sigma audio ADC," IEEE Journal of Solid-State Circuits, vol. 43, no. 5, pp. 1195-1206, 2008. doi: 10.1109/JSSC.2008.920329.
[5] J. Sauerbrey, T. Tille, D. Schmitt-Landsiedel, and R. Thewes, "A 0.7-V MOSFET-only switched-opamp Sigma Delta modulator in standard digital CMOS technology," IEEE Journal of solid-state circuits, vol. 37, no. 12, pp. 1662-1669, 2002. doi: 10.1109/JSSC.2002.804330.
[6] F. Chen and B. Leung, "A 0.25-mW low-pass passive sigma-delta modulator with built-in mixer for a 10-MHz IF input," IEEE Journal of Solid-State Circuits, vol. 32, no. 6, pp. 774-782, 1997. doi: 10.1109/4.585244.
[7] H. Luo, Y. Han, R. C. Cheung, X. Liu, and T. Cao, "A 0.8-V 230-µW 98-dB DR Inverter-Based Sigma Delta Modulator for Audio Applications," IEEE Journal of Solid-State Circuits, vol. 48, no. 10, pp. 2430-2441, 2013. doi: 10.1109/JSSC.2013.2275659.
[8] Y. Lin and M. Ismail, "Time-based all-digital sigma–delta modulators for nanometer low voltage CMOS data converters," Analog Integrated Circuits and Signal Processing, vol. 73, pp. 801-808, 2012. doi: 10.1007/s10470-012-9901-0.
[9] J. K. Fiorenza, T. Sepke, P. Holloway, C. G. Sodini, and H.-S. Lee, "Comparator-based switched-capacitor circuits for scaled CMOS technologies," IEEE Journal of Solid-State Circuits, vol. 41, no. 12, pp. 2658-2668, 2006. doi: 10.1109/JSSC.2006.884330.
[10] S. Ranganathan and Y. Tsividis, "Discrete-time parametric amplification based on a three-terminal MOS varactor: Analysis and experimental results," IEEE Journal of Solid-State Circuits, vol. 38, no. 12, pp. 2087-2093, 2003. doi: 10.1109/JSSC.2003.819162.
[11] P. M. Figueiredo and J. C. Vital, "The MOS capacitor amplifier," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 51, no. 3, pp. 111-115, 2004. doi: 10.1109/TCSII.2003.822427.
[12] A. Yoshizawa and S. Iida, "A gain-boosted discrete-time charge-domain FIR LPF with double-complementary MOS parametric amplifiers," in 2008 IEEE International Solid-State Circuits Conference-Digest of Technical Papers, 2008, pp. 68-596. doi: 10.1109/ISSCC.2008.4523060.
[13] J. P. Oliveira and J. Goes, "Parametric analog signal amplification applied to nanoscale CMOS technologie," Springer Science & Business Media, 2012.
[14] A. J. S. Alizadeh Zanjani, P. Torkzadeh, "Design and simulation of ultra-low-power sigma-delta converter using the fully differential inverter-based amplifier for digital hearing aids application," Journal of Intelligent Procedures in Electrical Technology, vol. 13, pp. 75-90, 2022.
[15] A. P. R. S. Sonam, "Dynamic Threshold MOS (DTMOS) And its Application," International Journal of Science, Engineering and Technology Research (IJSETR), vol. 5, 2016.
[16] N. C. Shirazi, A. Jannesari, and P. Torkzadeh, "Self-start-up fully integrated DC-DC step-up converter using body biasing technique for energy harvesting applications," AEU-International Journal of Electronics and Communications, vol. 95, pp. 24-35, 2018. doi: 10.1016/j.aeue.2018.07.033.
[17] J. R. Custódio, M. Figueiredo, E. Santin, and J. Goes, "A CMOS Inverter-Based Self-biased Fully Differential Amplifier," in Emerging Trends in Technological Innovation: First IFIP WG 5.5/SOCOLNET Doctoral Conference on Computing, Electrical and Industrial Systems, DoCEIS 2010, Costa de Caparica, Portugal, February 22-24, 2010. Proceedings 1, 2010, pp. 541-548. doi: 10.1007/978-3-642-11628-5_60.
[18] J. S. Cho, C. Rhee, S. Kim, Y. Yang, J. Jun, S. Kim, et al., "A 1.2-V 108.9-dB A-Weighted DR 101.4-dB SNDR Audio $\Sigma\Delta $ ADC Using a Multi-Rate Noise-Shaping Quantizer," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 10, pp. 1315-1319, 2018. doi: 10.1109/TCSII.2018.2853189.
[19] P. Li, W. Xi, X. Zeng, X. Li, and D. Zheng, "A Small-Area, Low-Power Delta-Sigma DAC Applied to a Power-Specific Chip," Journal of Sensors, vol. 2021, p. 6630100, 2021/05/25 2021. doi: 10.1155/2021/6630100.
[20] X. Honglin, F. Qiang, L. Hongna, Y. Liang, W. Pengfei, and L. Xiaowei, "A 16-bit sigma–delta modulator applied in micro-machined inertial sensors," Journal of Semiconductors, vol. 35, no. 4, p. 045007, 2014. doi: 10.1088/1674-4926/35/4/045007.
[21] R. Schreier and G. C. Temes, Understanding delta-sigma data converters vol. 74: IEEE press Piscataway, NJ, 2005.
[22] R. Wei, W. Wang, X. Xiao, and Q. Chen, "A low-power delta-sigma Capacitance-to-Digital converter for capacitive sensors," IEEE Access, vol. 7, pp. 78281-78288, 2019. doi: 10.1109/ACCESS.2019.2922840.
[23] X.-P. Di, W.-P. Chen, L. Yin, and X.-W. Liu, "A 99.7-dB DR fourth-order sigma–delta modulator for digital gyroscope sensor," Modern Physics Letters B, vol. 31, no. 09, p. 1750097, 2017. doi:10.1142/S021798491750097X.
[24] A. F. Yeknami, "Low-Power Delta-Sigma Modulators for Medical Applications," 2014.
[25] F. Michel and M. S. Steyaert, "A 250 mV 7.5 μW 61 dB SNDR SC ΔΣ modulator using near-threshold-voltage-biased inverter amplifiers in 130 nm CMOS," IEEE Journal of solid-state circuits, vol. 47, no. 3, pp. 709-721, 2012. doi: 10.1109/JSSC.2011.2179732.
[26] J.-E. Park, Y.-H. Hwang, and D.-K. Jeong, "A 0.4-to-1 V Voltage Scalable Delta Sigma ADC With Two-Step Hybrid Integrator for IoT Sensor Applications in 65-nm LP CMOS," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 64, no. 12, pp. 1417-1421, 2017. doi: 10.1109/TCSII.2017.2753841.
[27] V. Sharma, N. Kumar YB, and V. MH, "36 μW fourth order sigma-delta modulator using single operational amplifier," International Journal of Electronics Letters, vol. 9, no. 2, pp. 1-16, 2020. doi: 10.1080/21681724.2020.1717003.
[28] L.-M. Chen, Z.-H. Yu, C.-Y. Chen, X.-Y. Hu, J. Fan, J. Yang, et al., "A 1-V, 1.2-mA fully integrated SoC for digital hearing aids," Microelectronics Journal, vol. 46, no. 1, pp. 12-19, 2015. doi:10.1016/j.mejo.2014.09.013.
[29] S. Porrazzo, A. Morgado, D. S. S. Bello, F. Cannillo, C. Van Hoof, R. F. Yazicioglu, et al., "A 155 µW 88-dB DR Discrete-Time Delta Sigma Modulator for Digital Hearing Aids Exploiting a Summing SAR ADC Quantizer," IEEE transactions on biomedical circuits and systems, vol. 7, no. 5, pp. 573-582, 2013. doi: 10.1109/TBCAS.2013.2280694.
[30] J. R. Custódio, J. Goes, N. Paulino, J. P. Oliveira, and E. Bruun, "A 1.2-V 165-μW 0.29-mm² Multibit Sigma-Delta ADC for Hearing Aids Using Nonlinear DACs and With Over 91 dB Dynamic-Range," IEEE Transactions on Biomedical Circuits and Systems, vol. 7, no. 3, pp. 376-385, 2013. doi:10.1109/TBCAS.2012.2203819.
[31] Wang B, Sin SW, Seng-Pan U, Maloberti F, Martins RP. "A 550µW 20-kHz BW 100.8-dB SNDR Linear-Exponential Multi-Bit Incremental Sigma Delta ADC With 256 Clock Cycles in 65-nm CMOS", IEEE Journal of Solid-State Circuits, 2019 Jan 8; vol. 54, no. 4, pp. 1161-1172, doi: 10.1109/JSSC.2018.2888872.
[32] H. Jeon, J. -S. Bang, Y. Jung, I. Choi and M. Je, "A High DR, DC-Coupled, Time-Based Neural-Recording IC With Degeneration R-DAC for Bidirectional Neural Interface," in IEEE Journal of Solid-State Circuits, vol. 54, no. 10, pp. 2658-2670, Oct. 2019, doi: 10.1109/JSSC.2019.2930903.
[33] S. Rout and W. Serdijn, “High-pass Δ converter design using a state space approach and its application to cardiac signal acquisition,” IEEE Trans. Biomed. Circuits Syst., vol. 12, no. 3, pp. 483–494, Jun. 2018. doi: 10.1109/TBCAS.2018.2817926.
[34] S. -Y. Lee, P. -H. Su, K. -L. Huang, Y. -W. Hung and J. -Y. Chen, "High-Pass Sigma–Delta Modulator With Techniques of Operational Amplifier Sharing and Programmable Feedforward Coefficients for ECG Signal Acquisition," in IEEE Transactions on Biomedical Circuits and Systems, vol. 15, no. 3, pp. 443-453, June 2021, doi: 10.1109/TBCAS.2021.3082545.
[35] M. Shahriary,A. Ghasemi and N. C. Shirazi, "Improvement of SNDR using Optimization of Feedback Path Coefficients for Second Order CRFB Modulators in Sigma-Delta Analog to Digital Converters," Journal of Southern Communication Engineering, vol. 11, no. 41, pp. 15-28, 2021.
