Design of 0.4 V operational amplifier using low-power techniques

Subject Areas : Majlesi Journal of Telecommunication Devices

Saber  Izadpanah tous ¹ (Sadjad Institute for Higher Education)
Mahmoud  Behroozi ² (Sadjad Institute for Higher Education)
Vahid  Asadpoor ³ ()

Received: 2013-03-14 Accepted : 2013-03-14 Published : 2013-03-01

Keywords: en,

Abstract :

In this paper a low-power low-voltage CMOS operational amplifier (op amp) using sub-threshold region of MOSFET for bio-medical instrumentation operating with a 0.4 V supply is described. A two stage operational amplifier is designed and simulated using 0.18 μm CMOS technology. Two types of low-power low-voltage design techniques        (a) bulk-driven (b) dynamic threshold voltage MOSFET (DTMOS) are used. With bulk-driven technique, the open loop gain is 69.88 dB, the unity gain-bandwidth (UGBW) is 87.1 kHz, CMRR obtained is 83 dB and phase margin is 88.78 degree with 10pF load. The power consumption is 1.8 μW. With DTMOS technique, the open loop gain is    83.31 dB, the unity gain-bandwidth is 758.6 kHz, CMRR obtained is 157.1 dB and phase margin is 71.5 degree with 10pF load. The power consumption is 1.8 μW. DTMOS technique provides high unity gain-bandwidth and high open loop gain as compared to bulk-driven technique.

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