A new asymmetric cascaded multilevel inverter with reduced switches and dc sources count

Subject Areas : journal of Artificial Intelligence in Electrical Engineering

roya naderi ^{1 *}

1 - Department of Electrical Engineering, Heris Branch, Islamic Azad University, heris, Iran

Received: 2024-11-18 Accepted : 2024-12-31 Published : 2025-02-17

Keywords: Cascaded multilevel H-Bridge, symmetric series multilevel inverter, asymmetric series multilevel inverter,

Abstract :

In this manuscript, a basic unit topology of cascaded multilevel H-Bridge inverter along with the extended topology is proposed in which H-Bridge is utilized to generate positive and negative voltage outputs. A dc source magnitude calculation method is proposed using which the equations for calculating number of IGBTs, isolated dc sources, gate driver circuits and output voltage levels are derived. The proposed topology is compared with recent similar topologies in different aspects using the mentioned equations. The comparison results reveal that the proposed topology has superiority over similar topologies and requires lower number of power electronic switches, gate driver circuits and isolated dc voltage sources which will decrease complexity and cost of the inverter design. Finally, the accurate performance of proposed inverter will be verified through software simulation in PSCAD/EMTDC platform.

References:


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