TY  - JOUR
AU  - Chamanpira, Najmeh
AU  - Zanjani, Seyed Mohammad Ali
AU  - Dolatshahi, Mehdi
TI  - Design and simulation of a new sample and hold circuit with a resulation of 12-bit and a sampling rate of 1 GS/s using a dual sampling technique.
JO  - Journal of Intelligent Procedures in Electrical Technology
VL  - 9
IS  - 34
SP  - 3
EP  - 10
PY  - 2018
DO  - 
ER  -