TY  - JOUR
AU  - Zanjani, Sayed Mohammadali 
AU  - Sadrarhami, Hamidreza
AU  - Dolatshahi, Mehdi
AU  - Barekatain, Behrang
TI  - Design and Simulation of Low Power Adder Circuits Using MGDI Gate in QCA Technology
JO  - Technovations of Electrical Engineering in Green Energy System
VL  - 3
IS  - 3
SP  - 69
EP  - 84
PY  - 2024
DO  - 10.30486/TEEGES.2024.904850
ER  -