%0 Journal Article
%A Torkzadeh, Pooya, Roshanpanah, Abolfazl, Hajsadeghi, Khosrow, Dousti, Massoud
%T Design and Implementation of a 16-bit Multi-Mode Delta-Sigma Digital-to-Analog Converter with Time-Interleaved Structure, Multi-Channel, and Compensation of Non-Idealities Based on FPGA
%J Journal of Southern Communication Engineering
%V 14
%N 54
%P 93-117
%D 2025
%R 10.30495/jce.2025.1993480.1330
%U https://sanad.iau.ir/fa/Article/1105014